SPRADH8 September   2024 AM6442

1.   1
2.   Abstract
3.   Trademarks
4. 1 Introduction
   1. 1.1 AM64x and AM243x EVMs
   2. 1.2 SoC Architecture
      1. 1.2.1 AM64x
      2. 1.2.2 AM243x
   3. 1.3 Peripherals
      1. 1.3.1 CPSW3G
      2. 1.3.2 PRU-ICSSG
   4. 1.4 Ethernet Software Architecture
   5. 1.5 Prerequisite
      1. 1.5.1 HW Prerequisite
      2. 1.5.2 SW Prerequisite
         1. 1.5.2.1 Resource Allocation - AM64x
         2. 1.5.2.2 SBL update
5. 2 Multicore 5-Ethernet Ports Realization
6. 3 Supported Configurations on PRU-ICSSG
7. 4 Implementation
   1. 4.1 System Example
      1. 4.1.1 Software Architecture
      2. 4.1.2 5-Ethernet Port Example
8. 5 Debug Steps
9. 6 Reference Logs
10. 7 Testing for the ICSSG0 and ICSSG1 Functionality
11. 8 ICSSG and CPSW
12. 9 Summary
13. 10References