In LLC converter a switching frequency change would require multiple PWM registers to be updated accordingly, including TBPRD, CMPx or TBPHS in multi-phase interleaved topology. Thus, it is necessary to have a mechanism to shorten the CPU cycles needed for updating registers and to sync up the shadow to load active of multiple registers.

In type-4 ePWM, a new global load feature can be used for all the shadow registers if the corresponding GLDCFG[REGx] is set to 1, and all the load from shadow to active register happens simultaneously once the event configured by GLDMODE register happens. The available global load event source is presented in Figure 2-1.

Additionally, in LLC converter, since multiple power switches share the same switching frequency and duty cycle in the converter. The PWMLINK can be enabled by configuring the corresponding bits in EPWMXLINK register. For example, if EPWM2LINK[CMPALINK] is set to 0x0000(EPWM1), then all the writing to EPWM1 CMPA register result in a simultaneous writing to EPWM2 CMPA.

By doing all the procedures above, you could shorten the PWM upgrade time period as much as possible, and also forbidden unexpected shadow to active load before PWM upgrade finishes.

Overall, type-4 ePWM’s new feature would significantly simplify the control of LLC conversion and help reduce the potential risk caused by unexpected PWM behavior.