SPRUIT1B May   2020  – November 2020

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Key Features
  3. 2GESI Expansion Board Overview
    1. 2.1 GESI Expansion Board Identification
    2. 2.2 GESI Expansion Board Component Identification
  4. 3GESI Expansion Board - User Setup/Configuration
    1. 3.1 GESI Infotainment Expansion Board With CP Board
      1. 3.1.1 Board Assembly Procedures
    2. 3.2 Power Requirements
    3. 3.3 EVM Reset/Interrupt Push Buttons
    4. 3.4 EVM Configuration DIP Switch
  5. 4GESI Expansion Board Hardware Architecture
    1. 4.1  GESI Expansion Board Hardware Top Level Diagram
    2. 4.2  Expansion Connectors
    3. 4.3  Board ID EEPROM
    4. 4.4  Ethernet Interface
      1. 4.4.1 RGMII Clocking Scheme
      2. 4.4.2 Ethernet Port LED Indication
    5. 4.5  PROFI BUS / RS485
    6. 4.6  LIN Interface
    7. 4.7  MCAN
    8. 4.8  MUX Selection
      1. 4.8.1 MUX – PRGx_MDIO/MDC, CPSW9G_MDIO/MDC
      2. 4.8.2 MUX – PRG1_RGMII1/PRG1_PWM
      3. 4.8.3 MUX – PRG1_PWM/MCAN
      4. 4.8.4 MUX_MC/BP_SEL
    9. 4.9  GESI LaunchPad-Booster Pack Interface
    10. 4.10 Motor Control Interface
    11. 4.11 USS/IMU Header
    12. 4.12 Test Header
  6.   A Interface Mapping
  7.   B GESI Board GPIO Mapping
  8.   C I2C Address Mapping
  9.   D Revision History

GESI LaunchPad-Booster Pack Interface

A GESI Launchpad connectors (J5 and J16) provided in GESI board to interface with Boosterpack modules. BoosterPack plug-in modules shall be plugged in to extend the functionality like wireless connectivity, capacitive touch, temperature sensing, displays and much more. Table 4-7 contains the pin out details of both connectors.

Except BOOST-DRV8848, all other BP interfaces listed below are supported similar to Maxwell EVM:

  • BOOSTXL-ULN2003
  • BOOST-DRV8711
  • BOOSTXL-DRV8301
  • CC3100BOOST
  • BOOST-CC2564MODA

For resistor population option to support specific Boosterpack module, see Figure 4-13.

Table 4-7 Pinouts of Booster Pack Interfacing Connectors
J16 – LHS J5 – RHS
Pin Net Name Function Pin Net Name Function
1 VCC_3V3_BP 1 BP_PRG1_PWM3_A0 PWM/GPIO
2 VCC_5V0_BP 2 DGND
3 MCU_ADC1_AIN7 GPIO/ADC_IN 3 BP_PRG1_PWM3_B0 PWM/GPIO
4 DGND 4 SPI3_CS1 GPIO/SPI_CS
5 BP/MC_PRG1_UART0_RXD GPIO/UART_RXD 5 BP_PRG1_PWM3_A2 PWM/GPIO
6 MCU_ADC1_AIN0 ADC_IN 6 SPI3_CS2 GPIO/SPI_CS
7 BP/MC_PRG1_UART0_TXD GPIO/UART_TXD 7 PRG1_PWM2_B1 PWM/UART_RTS
8 MCU_ADC1_AIN1 ADC_IN 8 NC
9 BP_GPIO2 GPIO 9 BP_PRG1_PWM3_B1 PWM/UART_CTS
10 MCU_ADC1_AIN2 ADC_IN 10 PERIPH_RSTz RESET
11 UART3_RX GPIO/UART_RXD 11 BP_PRG1_PWM0_B0 PWM/GPIO
12 MCU_ADC1_AIN3 ADC_IN 12 SPI3_D0 SPI_MOSI
13 SPI3_CLK SPI_CLK/UART_TXD 13 UART3_RTSn UART_RTS
14 MCU_ADC1_AIN4 ADC_IN/I2S_WCLK 14 SPI3_D1 SPI_MISO
15 BP_GPIO3 GPIO 15 UART3_CTSn UART_CTS
16 MCU_ADC1_AIN5 ADC_IN/I2S_BCLK 16 BP_PRG1_PWM0_B1 GPIO/PWM
17 BP_PRG1_PWM2_A0 PWM/GPIO 17 NC
18 MCU_ADC1_AIN6 ADC_IN/I2S_DOUT 18 BP_PRG1_PWM0_B2 GPIO/PWM
19 BP_PRG1_PWM2_A1 PWM/GPIO 19 NC
20 BP_MCASP10_AXR1 I2S_DIN 20 BP_GPIO4 GPIO

Figure 4-13 shows the BoosterPack headers on GESI Expansion Board.

GUID-6499BE24-D61C-414D-ADB9-6DBF56114476-low.jpg Figure 4-13 BoosterPack Headers
GUID-983206F3-73FB-4857-80B1-F2C3387DB1C8-low.png Figure 4-14 BoosterPack I/F LHS Headers
GUID-7A578CCD-1A62-4E26-BFEF-D24C342935DD-low.png Figure 4-15 BoosterPack I/F RHS Headers
GUID-E2A5A5B4-2F3F-4AAD-8DAA-6A54B7AA47F6-low.gif Figure 4-16 GESI launchpad-Booster Pack Pinout