The LM3881 Simple Power Sequencer provides a simple solution for sequencing multiple rails in a controlled manner. An established clock signal facilitates control of the power up and power down of three open-drain FET output flags. These flags permit a connection to the shutdown or enable pins of the linear regulators or switching regulators to control the operation of the power supplies. This allows the design of a complete power system without the concern of large inrush currents or latch-up conditions that can occur during an uncontrolled startup. An invert (INV) pin reverses the logic of the output flags. This pin should be tied to a logic output high or low, and not be allowed to remain an open circuit. The following sections assume that the INV pin is held low such that the flag output is active high.
Figure 2-5 shows the functional block diagram of the LM3881.