SPRAD72 February   2023 TMS320F28388D , TMS320F28388S , TMS320F28P650DH , TMS320F28P650DK , TMS320F28P650SH , TMS320F28P650SK , TMS320F28P659DH-Q1 , TMS320F28P659DK-Q1 , TMS320F28P659SH-Q1


  1.   Abstract
  2.   Trademarks
  3. 1Introduction of SMI
  4. 2PHY Selection and Configuration for EtherCAT
  5. 3How to Read and Write to the PHY Register Using SMI of ESC
    1. 3.1 PHY Register Configuration for EtherCAT
    2. 3.2 Steps to Read or Write PHY Register in C2000 ESC
    3. 3.3 Using the Script to Debug Ethernet PHY Register in CCS
  6. 4Summary
  7. 5References


The Ethernet physical layer (PHY) is a transceiver component for transmitting and receiving data of Ethernet frames and the PHY device implements the physical layer in the open systems interconnection (OSI) model. The PHY device acts as a bridge between the medium access controller (MAC - data link layer in OSI model) and a physical medium such as copper or fiber cable.

The serial management interface (SMI) provides access to the PHY device internal register space for status information and configuration. Proper PHY configuration using SMI is fundamental during the prototype stage, and also crucial to meeting the requirements of the lowest deterministic latency and fastest link detection in industrial Ethernet applications such as EtherCAT®. The SMI is compatible with IEEE 802.3 clause 22 and clause 45. The implemented register set consists of the registers required by the IEEE 802.3 plus several others to provide additional visibility and controllability of the PHY device.

This application note provides guidance on the Ethernet PHY configuration using SMI of the EtherCAT slave controller (ESC) in the C2000™ device for industrial applications.