DLPS013H April   2010  – December 2024 DLP5500

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Description (continued)
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  Storage Conditions
    3. 6.3  ESD Ratings
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Electrical Characteristics
    7. 6.7  Timing Requirements
    8. 6.8  System Mounting Interface Loads
    9. 6.9  Micromirror Array Physical Characteristics
    10. 6.10 Micromirror Array Optical Characteristics
    11. 6.11 Window Characteristics
    12. 6.12 Chipset Component Usage Specification
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Video Modes
      2. 7.4.2 Structured Light Modes
        1. 7.4.2.1 Static Image Buffer Mode
        2. 7.4.2.2 Real Time Structured Light Mode
    5. 7.5 Window Characteristics and Optics
      1. 7.5.1 Optical Interface and System Image Quality
      2. 7.5.2 Numerical Aperture and Stray Light Control
      3. 7.5.3 Pupil Match
      4. 7.5.4 Illumination Overfill
    6. 7.6 Micromirror Array Temperature Calculation
      1. 7.6.1 Package Thermal Resistance
      2. 7.6.2 Case Temperature
      3. 7.6.3 Micromirror Array Temperature Calculation for Uniform Illumination
    7. 7.7 Micromirror Landed-on/Landed-Off Duty Cycle
      1. 7.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 7.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 7.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 7.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 DLP5500 System Interface
  10. 9 Power Supply Recommendations
    1. 9.1 DMD Power-Up and Power-Down Procedures
  11. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Impedance Requirements
      2. 10.1.2 PCB Signal Routing
      3. 10.1.3 Fiducials
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Documentation
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MINMAXUNIT
ELECTRICAL
VCCVoltage applied to VCC(2)(3)–0.54V
VCCIVoltage applied to VCCI(2)(3)–0.54V
Delta supply voltage |VCC – VCCI|(4)0.3V
|VID|Maximum differential voltage, Damage can occur to internal resistor if exceeded, See Figure 6-6700mV
VCC2Voltage applied to VOFFSET(2)(3)(4)–0.58V
VMBRSTVoltage applied to MBRST[0:15] Input Pins–2828V
Voltage applied to all other pins(2)–0.5VCC + 0.3V
IOHCurrent required from a high-level outputVOH = 2.4 V–20mA
IOLCurrent required from a low-level outputVOL = 0.4 V15mA
ENVIRONMENTAL
TCASECase temperature: operational (5) (6)–2090°C
Case temperature: non–operational (6)–4090°C
Dew Point (Operating and non-Operating)81°C
(1) Stresses beyond those listed under Section 6.1 may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Section 6.4. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages referenced to VSS (ground).
(3) Voltages VCC, VCCI, and VCC2 are required for proper DMD operation.
(4) Exceeding the recommended allowable absolute voltage difference between VCC and VCCI may result in an excess current draw. The difference between VCC and VCCI, | VCC - VCCI|, should be less than .3V.
(5) Exposure of the DMD simultaneously to any combination of the maximum operating conditions for case temperature, differential temperature, or illumination power density (see Section 6.4).
(6) DMD Temperature is the worst-case of any test point shown in Figure 7-4or the active array as calculated by the Section 7.6.