DLPS190C September   2020  – January 2025 DLP471NE

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Storage Conditions
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Thermal Information
    6. 5.6  Electrical Characteristics
    7. 5.7  Switching Characteristics
    8. 5.8  Timing Requirements
    9. 5.9  System Mounting Interface Loads
    10. 5.10 Micromirror Array Physical Characteristics
    11. 5.11 Micromirror Array Optical Characteristics
    12. 5.12 Window Characteristics
    13. 5.13 Chipset Component Usage Specification
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Power Interface
      2. 6.3.2 Timing
    4. 6.4 Device Functional Modes
    5. 6.5 Optical Interface and System Image Quality Considerations
      1. 6.5.1 Numerical Aperture and Stray Light Control
      2. 6.5.2 Pupil Match
      3. 6.5.3 Illumination Overfill
    6. 6.6 Micromirror Array Temperature Calculation
    7. 6.7 Micromirror Power Density Calculation
    8. 6.8 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 6.8.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 6.8.2 Landed Duty Cycle and Useful Life of the DMD
      3. 6.8.3 Landed Duty Cycle and Operational DMD Temperature
      4. 6.8.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
    3. 7.3 Temperature Sensor Diode
  9. 8 Power Supply Recommendations
    1. 8.1 DMD Power Supply Power-Up Procedure
    2. 8.2 DMD Power Supply Power-Down Procedure
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Impedance Requirements
    3. 9.3 Layers
    4. 9.4 Trace Width, Spacing
    5. 9.5 Power
    6. 9.6 Trace Length Matching Recommendations
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Device Support
      1. 10.2.1 Device Nomenclature
      2. 10.2.2 Device Markings
    3. 10.3 Documentation Support
      1. 10.3.1 Related Documentation
    4. 10.4 Receiving Notification of Documentation Updates
    5. 10.5 Support Resources
    6. 10.6 Trademarks
    7. 10.7 Electrostatic Discharge Caution
    8. 10.8 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Package Option Addendum
      1. 12.1.1 Packaging Information

7.2 Typical Application

The DLP471NE DMD combined with DLPC7540 digital controller and a power management device provides full HD (1920x1080) resolution for bright, colorful display applications. A typical display system using laser phosphor illumination combines the DLP471NE DMD, DLPC7540 display controller, TPS65145 voltage regulator and DLPA100 PMIC and motor driver. Figure 7-1 shows a system block diagram for this configuration of the DLP 0.47” Full HD chipset and additional system components needed. See Figure 7-2, a block diagram showing the system components needed along with the lamp configuration of the DLP 0.47” Full HD chipset. The components include the DLP471NE DMD, DLPC7540 display controller and the DLPA100 PMIC and motor driver and a TPS65145 PMIC.

DLP471NE Typical Full HD Laser Phosphor Application Diagram Figure 7-1 Typical Full HD Laser Phosphor Application Diagram
DLP471NE Typical Full HD Lamp Application Diagram Figure 7-2 Typical Full HD Lamp Application Diagram