Design Description

Signal-measurement equipment like the oscilloscope (DSO) and data aquisition (DAQ) must manage input signals that are not within the input range of the measurement analog-to-digital converter (ADC). To bring the unknown input signal in the measurement range of the ADC, the first operation needed is offset control. A programmable offset control circuit providing both positive and negative offset, performs this function. This circuit uses a precision digital-to-analog converter (DAC), followed by a unipolar-to-bipolar conversion circuit using an op amp. The output of this circuit is fed to a summing amplifier that adds this DC output to the input signal.

Design Notes

1. Choose a DAC with the required resolution and output range
2. Choose an op amp with low offset and low drift to minimize error. Thermal noise can be an additional requirement in some applications
3. Choose R_G1, R_G2, and R_FB such that the desired output offset is met
4. Choose the compensation capacitor C_FB such that it is larger than the input capacitance of the op-amp inputs

Design Steps

1. Select the DAC80504 device: a 16-bit, 4-channel buffered voltage output DAC with 2.5V internal reference. Devices with an external reference option or devices with accessible internal references are desirable in this application as the reference is used to create an offset. The DAC selection in this design should primarily be based on DC error contributions, typically described by offset-error, gain-error, and integrated non-linearity (INL) error.
2. Select an op amp such as the OPA227 operational amplifier that combines low noise and wide bandwidth with high precision to make it the optimal choice for applications requiring both AC and precision DC performance. Amplifier input offset voltage (V_OS) is a key consideration for this design. V_OS of an operational amplifier is a typical data sheet specification, but in-circuit performance is also impacted by drift overtemperature, the common-mode rejection ratio (CMRR), and power supply rejection ratio (PSRR); therefore, give consideration to these parameters as well.
3. The DC transfer function of the offset voltage is given by:
   
   • First, using the previous transfer function, consider the negative full-scale output case when V_DAC is equal to 0V, V_REF is equal to 2.5V, and V_OFFSET is equal to –5V. This case is used to calculate the ratio of R_FB to R_G2 and is shown in the following equation:
     

     That gives, R_FB = 2 × R_G2.

   • Second, consider the positive full-scale output case when V_DAC is equal to 2.5 V, V_REF is equal to 2.5V, and V_OUT is equal to 5V. This case is used to calculate the ratio of R_FB to R_G1 and is shown in the following equation:
     

     This means, R_G1 = R_FB.

   • Finally, select a value of R_G2 to calculate the ideal values of R_FB and R_G1. The key considerations for seeding the value of R_G2 should be the drive strength of the reference source as well as choosing small resistor values to minimize noise contributed by the resistor network. For this design, R_G2 was chosen to be 8kΩ, which will limit the peak current draw from the reference source to approximately 312µA, under nominal conditions. The 312µA is well within the 5-mA limit of the DAC80504 device. By putting the value of R_G2 in previous equations, R_G1 and R_FB is calculated as R_G1 = R_FB = 16kΩ.

4. In general, the compensation capacitor C_FB is not set by fixed equations, but rather by choosing values while observing the output small-signal step response. Through simulation in this example, select C_FB ≥ 22pF.

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