SBAU432A December   2023  – May 2025 AFE7728D , AFE7768D , AFE7769D

 

  1.   Abstract
  2.   2
  3.   Trademarks
  4. 1Introduction
  5. 2Basic EVM Test Procedures
    1. 2.1 Safety
    2. 2.2 Quality
    3. 2.3 Apparel
    4. 2.4 Hardware and Software Requirements
      1. 2.4.1 Test Equipment Required
      2. 2.4.2 Software Required
  6. 3AFE7769DEVM Setup
    1. 3.1 AFE7769D Hardware Changes
    2. 3.2 AFE7769D Connections
    3. 3.3 AFE7769D Software Setup
    4. 3.4 AFE7769D Programming Method 1: Automated
    5. 3.5 AFE7769D Programming Method 2: Using GUI Mode
  7. 4Revision History

AFE7769D Programming Method 2: Using GUI Mode

Note:

For GUI Mode automation, the final step will require reference to Picocom's PC802 EVB RFIC Demonstration User Guide (Version 3), which can be procured through submitting a request on the company site.

  1. Open the AFE77xxD Latte GUI version 1.4. Make sure the insterface looks like Figure 3-8, then click Continue. The message “Couldn’t Detect FPGA Reset FTDI. Please reset FPGA manually.” is expected and can be ignored.
     Launching AFE77xxD Latte SoftwareFigure 3-8 Launching AFE77xxD Latte Software
  2. Wait until the GUI loads to the User Guide window, as shown in Figure 3-9. Click the AFE-Configuration tab under the tree view on the left for the main parameters screen.
     User-Guide, AFE77xxD Latte SoftwareFigure 3-9 User-Guide, AFE77xxD Latte Software
  3. Click Browse under Load System Parameters and select the "AFE77xxD_Picocom_pc802_K1L.xlsx" config file under "\Documents\Texas Instruments\AFE77xxDLatte\lib\configs". After selecting the file, click LOAD. Figure 3-10 shows the main window screen. You should also see a message in the Log window saying that the configuration was loaded.
     Main Window: AFE-ConfigurationFigure 3-10 Main Window: AFE-Configuration
  4. After that, under Hardware Connection, click the refresh GUI button to see a message on the log window saying “Refreshed GUI”. Then click Device Bringup to start the bringup for the device. For proper navigation, see Figure 3-11.
     Execute Device ConfigurationFigure 3-11 Execute Device Configuration
  5. After the device bringup is done, you will see some errors on the log window (shown in Figure 3-12). Two of these errors should be “FPGA Reset device not found” and the rest should be under the “Device DAC JESD-RX 0 Link Status” line. These errors are expected because the JESD link is not up.
     Latte Log Window Post-Device ConfigurationFigure 3-12 Latte Log Window Post-Device Configuration
  6. At the top, click Latte Mode and navigate to Script Mode as shown in Figure 3-13.
     Switching to Script ModeFigure 3-13 Switching to Script Mode
  7. Open the PC802_LMKDIV.py script on the tree view on the left, as shown in Figure 3-14.
     RNS802 LMK ScriptFigure 3-14 RNS802 LMK Script
  8. Run the script by pressing F5 or by clicking Run > Buffer. An output in the log window like Figure 3-15 signals that the script was run with no errors. After running this script, the LMK_LOCKED LED (D11) turns on if the 122.88MHz reference from the RNS802 is connected.
     Running the LMK ScriptFigure 3-15 Running the LMK Script
  9. Click Latte Mode and navigate to GUI Mode as shown in Figure 3-16.
     Switching to GUI ModeFigure 3-16 Switching to GUI Mode
  10. Click TX-Test under the tree view, as shown in Figure 3-17.
     Switching to the Channel Controls Tab in LatteFigure 3-17 Switching to the Channel Controls Tab in Latte
  11. Enable the TDD for the TX channels by setting them to green like in Figure 3-18. Then, click Set TX TDD. A message should appear on the log window that says “TDD set”.
     Enabling TX TDDFigure 3-18 Enabling TX TDD
  12. Proceed to set up the RNS802 by following the PC802 EVB RFIC Demonstration User Guide (Version 3) from section 2.2. When you get to section 2.2.5, after you enter the start command on the test mode tool to start sending data, type the “AFE.adcDacSync(1)” command in the Command line of the AFE77xxD GUI. You should now be able to see a report in the log window that the JESD link is up with no errors like in Figure 3-19. Data now flows through the AFE TX channel.
     JESD Link BringupFigure 3-19 JESD Link Bringup