The ADS125R14 EVM is designed to easily connect to an external controller. This design enables the user to test application code and firmware on the ADS125R14 without having to develop a custom PCB. This section describes the specific connections required to use the ADS125R14 EVM with an external controller. Figure 2-8 shows the location of various headers, connectors, and terminal blocks described in this section.
Complete the following steps to prepare the ADS125R14 EVM for use with an external controller:
- Remove the PHI board if still connected to the EVM.
- Connect the external controller ground and bench supply ground to the GND pins on the EVM.
- Connect an external bench supply to the ADC AVDD pin by performing only one of the following two options:
- Remove the shunt on jumper JP11 and apply 5.5V to the "LDO IN" pin on jumper JP11.
- Remove the shunt on jumper JP12 and apply the AVDD voltage to the "AVDD" pin on jumper JP12.
- Connect an external bench supply to the ADC DVDD pin by removing the shunt on jumper JP1 and applying the DVDD voltage to the "DVDD" pin on jumper JP1.
- Apply digital communication signals to header J2 on the EVM:
- Connect POCI (peripheral out, controller in) from the controller to the DOUT pin.
- Connect PICO (peripheral in, controller out) from the controller to the DIN pin.
- Connect SCLK from the controller to the SCLK pin.
- Connect CS from the controller to the CS pin.
- Connect an I/O pin from the controller to the DRDY pin. DRDY is an output from the ADC that indicates when new data are ready to be clocked out of the ADC. Write a user-defined data collection routine that monitors this pin (polling or interrupt) and only transfers data after a falling edge.
- (Optional) Connect I/O pins from the controller to the SYNC/PWDN and RESET pins to control conversions and reset the device, respectively.
- (Optional) Connect an external Voltage Reference or Clock.
- Connect the signal source to the terminal blocks.
Verify that the external power supply voltages, communication signal levels, and applied input signals meet the specifications listed in Table 1-1.