SBOS014B
September 2000 – January 2026
INA114
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Application and Implementation
6.1
Application Information
6.1.1
Setting the Gain
6.1.2
Noise Performance
6.1.3
Offset Trimming
6.1.4
Input Bias Current Return Path
6.1.5
Input Common-Mode Range
6.1.6
Input Protection
6.1.7
Output Voltage Sense (SOIC-16 Package Only)
6.2
Typical Applications
7
Device and Documentation Support
7.1
Device Nomenclature
7.2
Receiving Notification of Documentation Updates
7.3
Support Resources
7.4
Trademarks
7.5
Electrostatic Discharge Caution
7.6
Glossary
8
Revision History
9
Mechanical, Packaging, and Orderable Information
5
Specifications
Note:
TI has qualified multiple fabrication flows for this device. Differences in performance are labeled by chip site origin (CSO). For system robustness, designing for all flows is highly recommended. For more information, please see
Section 7.1
.