SBOS998E June   2021  – March 2026 BUF802

PRODUCTION DATA  

1.   1
2. 1 Features
3. 2 Applications
4. 3 Description
5. 4 Pin Configuration and Functions
6. 5 Specifications
   1. 5.1 Absolute Maximum Ratings
   2. 5.2 ESD Ratings
   3. 5.3 Recommended Operating Conditions
   4. 5.4 Thermal Information
   5. 5.5 Electrical Characteristics Wide Bandwidth Mode
   6. 5.6 Electrical Characteristics Low Quiescent Current Mode
   7. 5.7 Typical Characteristics
7. 6 Parameter Measurement Information
8. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 Input and Output Overvoltage Clamp
      2. 7.3.2 Adjustable Quiescent Current
      3. 7.3.3 ESD Structure
   4. 7.4 Device Functional Modes
      1. 7.4.1 Buffer Mode (BF Mode)
         1. 7.4.1.1 BUF802 Used in BF Mode for Clock Buffer
      2. 7.4.2 Composite Loop Mode (CL Mode)
         1. 7.4.2.1 Alternative Approach for Realizing Composite Loop
9. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Applications
      1. 8.2.1 Oscilloscope Front-End Amplifier Design
         1. 8.2.1.1 Design Requirements
         2. 8.2.1.2 Detailed Design Procedure
         3. 8.2.1.3 Application Curves
      2. 8.2.2 Transforming a Wide-Bandwidth, 50Ω Input Signal Chain to High-Input Impedance
         1. 8.2.2.1 Detailed Design Procedure
         2. 8.2.2.2 Application Curves
   3. 8.3 Power Supply Recommendations
   4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
       1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
11. 10Revision History
12. 11Mechanical, Packaging, and Orderable Information