SBOSA39A April   2025  – October 2025 THS3470

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics ±VS = ±30V
    6. 5.6 Electrical Characteristics ±VS = ±20V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Current Limit
      2. 6.3.2 Output Current Enable
      3. 6.3.3 Over Temperature Flag
      4. 6.3.4 Output Current Flags
      5. 6.3.5 Output Current Monitoring
      6. 6.3.6 Die Temperature Monitoring
      7. 6.3.7 External Compensation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Power Modes
      2. 6.4.2 Choosing a Feedback Resistor
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 High-Voltage, High-Precision, Composite Amplifier
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 120V Bootstrap Amplifier
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
        3. 7.2.2.3 Application Performance Plots
    3. 7.3 Short Circuit Protection
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Thermal Considerations
        1. 7.5.1.1 Top-Side Cooling Benefits
        2. 7.5.1.2 THS3470 Safe Operating Area
      2. 7.5.2 Layout Guidelines
      3. 7.5.3 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TAPE AND REEL INFORMATION

7.2.2.1 Design Requirements

The goal of this design is to create a 100VPP signal using 3 THS3470 amplifiers in a bootstrap configuration. At a peak voltage of 50V, and with a 100 ohm resistive load, there is a 500mA dc output current delivered out of the signal amplifier. Voltage headroom in this design is limited the DC Output Current (500mA) times the sum of the isolation resistors of the supply and signal amplifiers (4ohms total) plus the output headroom of the signal and supply amplifiers (3V each). Adding these listed elements together, a total voltage headroom loss of 10V to each supply (+-60V) for a total output swing of 100VPP. Using 500mA of the total peak output current limit (2A) for dc allows a total slew rate of 1500V/us into a 1nF capacitive load at 1.5A of ac current. These load specifications were chosen to optimize for the total peak current limit (2A) with a 1nF capacitive and 100ohm resistive load, but can be adjusted accordingly to maximize for differing reactive and passive load combinations.

Table 7-2 Design Parameters
PARAMETER VALUE
Supply Voltage +-60V
Output Voltage 100VPP
Slew Rate 1500V/us
Output Load 100Ω + 1nF