SBOSA78 March   2026 INA1H182-SEP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Setting the Gain
        1. 6.3.1.1 Gain Drift
      2. 6.3.2 EMI Rejection
      3. 6.3.3 Input Common-Mode Range
      4. 6.3.4 Input Protection
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Reference Pin
      2. 7.1.2 Input Bias Current Return Path
    2. 7.2 Typical Applications
      1. 7.2.1 Resistor Temperature Detector Signal Conditioning Circuit
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Typical Characteristics

at TA = 25°C, VS = ±9V, RL = 10kΩ, VREF = 0V, and G = 1 (unless otherwise noted)

INA1H182-SEP Typical Distribution of Input Stage Offset Voltage
N = 2667
Figure 5-1 Typical Distribution of Input Stage Offset Voltage
INA1H182-SEP Typical Distribution of Output Stage Offset Voltage
N = 2667
Figure 5-3 Typical Distribution of Output Stage Offset Voltage
INA1H182-SEP Input Stage Offset Voltage vs Temperature
Figure 5-5 Input Stage Offset Voltage vs Temperature
INA1H182-SEP Typical Distribution of Input Bias Current, TA = 25°C
N = 292
Figure 5-7 Typical Distribution of Input Bias Current, TA = 25°C
INA1H182-SEP Typical Distribution of Input Offset Current
N = 94
Figure 5-9 Typical Distribution of Input Offset Current
INA1H182-SEP Input Offset Current vs Temperature
Figure 5-11 Input Offset Current vs Temperature
INA1H182-SEP Typical CMRR Distribution, G = 10
N = 294
Figure 5-13 Typical CMRR Distribution, G = 10
INA1H182-SEP CMRR vs Temperature, G = 10
Figure 5-15 CMRR vs Temperature, G = 10
INA1H182-SEP CMRR vs Frequency (RTI)
 
Figure 5-17 CMRR vs Frequency (RTI)
INA1H182-SEP Positive PSRR vs Frequency (RTI)
 
Figure 5-19 Positive PSRR vs Frequency (RTI)
INA1H182-SEP Gain vs Frequency
 
Figure 5-21 Gain vs Frequency
INA1H182-SEP Current Noise Spectral Density vs Frequency (RTI)
 
Figure 5-23 Current Noise Spectral Density vs Frequency (RTI)
INA1H182-SEP 0.1Hz to 10Hz RTI Voltage Noise, G = 1000
G = 1000
Figure 5-25 0.1Hz to 10Hz RTI Voltage Noise,
G = 1000
INA1H182-SEP Typical Distribution of Gain Error, G = 1
N = 5412
Figure 5-27 Typical Distribution of Gain Error,
G = 1
INA1H182-SEP Input Bias Current vs Common-Mode Voltage
Figure 5-29 Input Bias Current vs Common-Mode Voltage
INA1H182-SEP Gain Error vs Temperature, G = 10
Average of 294 unitsG = 10
Figure 5-31 Gain Error vs Temperature, G = 10
INA1H182-SEP Gain Nonlinearity, G = 10
Figure 5-33 Gain Nonlinearity, G = 10
INA1H182-SEP Offset Voltage vs Positive Common-Mode Voltage
Figure 5-35 Offset Voltage vs Positive Common-Mode Voltage
INA1H182-SEP Negative Output Voltage Swing vs Output Current
Figure 5-37 Negative Output Voltage Swing vs Output Current
INA1H182-SEP THD+N vs Frequency
500kHz measurement bandwidth
1VRMS output voltage100kΩ load
Figure 5-39 THD+N vs Frequency
INA1H182-SEP Small-Signal Response
G = 1RL = 10kΩCL = 100pF
Figure 5-41 Small-Signal Response
INA1H182-SEP Small-Signal Response
G = 100RL = 10kΩCL = 100pF
Figure 5-43 Small-Signal Response
INA1H182-SEP Closed-Loop Output Impedance
 
Figure 5-45 Closed-Loop Output Impedance
INA1H182-SEP Common-Mode EMI Rejection Ratio
 
Figure 5-47 Common-Mode EMI Rejection Ratio
INA1H182-SEP Input Common-Mode Voltage vs Output Voltage
VS = 5VG = 100
Figure 5-49 Input Common-Mode Voltage vs Output Voltage
INA1H182-SEP Typical Distribution of Input Stage Offset Voltage Drift
N = 81
Figure 5-2 Typical Distribution of Input Stage Offset Voltage Drift
INA1H182-SEP Typical Distribution of Output Stage Offset Voltage Drift
N = 81
Figure 5-4 Typical Distribution of Output Stage Offset Voltage Drift
INA1H182-SEP Output Stage Offset Voltage vs Temperature
Figure 5-6 Output Stage Offset Voltage vs Temperature
INA1H182-SEP Typical Distribution of Input Bias Current, TA = 90°C
N = 292
Figure 5-8 Typical Distribution of Input Bias Current, TA = 90°C
INA1H182-SEP Input Bias Current Vs Temperature
Figure 5-10 Input Bias Current Vs Temperature
INA1H182-SEP Typical CMRR Distribution, G = 1
N = 294
Figure 5-12 Typical CMRR Distribution, G = 1
INA1H182-SEP CMRR vs Temperature, G = 1
Figure 5-14 CMRR vs Temperature, G = 1
INA1H182-SEP Input Current vs Input Overvoltage
Figure 5-16 Input Current vs Input Overvoltage
INA1H182-SEP CMRR vs Frequency (RTI, 1kΩ source imbalance)
 
Figure 5-18 CMRR vs Frequency (RTI, 1kΩ source imbalance)
INA1H182-SEP Negative PSRR vs Frequency (RTI)
 
Figure 5-20 Negative PSRR vs Frequency (RTI)
INA1H182-SEP Voltage Noise Spectral Density vs Frequency (RTI)
 
Figure 5-22 Voltage Noise Spectral Density vs Frequency (RTI)
INA1H182-SEP 0.1Hz to 10Hz RTI Voltage Noise, G = 1
G = 1
Figure 5-24 0.1Hz to 10Hz RTI Voltage Noise,
G = 1
INA1H182-SEP 0.1Hz to 10Hz RTI Current Noise
G = 1
Figure 5-26 0.1Hz to 10Hz RTI Current Noise
INA1H182-SEP Typical Distribution of Gain Error, G = 10
N = 293
Figure 5-28 Typical Distribution of Gain Error,
G = 10
INA1H182-SEP Gain Error vs Temperature, G = 1
Average of 294 units
Figure 5-30 Gain Error vs Temperature, G = 1
INA1H182-SEP Gain nonlinearity, G = 1
Figure 5-32 Gain nonlinearity, G = 1
INA1H182-SEP Offset Voltage vs Negative Common-Mode Voltage
Figure 5-34 Offset Voltage vs Negative Common-Mode Voltage
INA1H182-SEP Positive Output Voltage Swing vs Output Current
Figure 5-36 Positive Output Voltage Swing vs Output Current
INA1H182-SEP Short-Circuit Current vs TemperatureFigure 5-38 Short-Circuit Current vs Temperature
INA1H182-SEP Overshoot vs Capacitive Loads
 
 
Figure 5-40 Overshoot vs Capacitive Loads
INA1H182-SEP Small-Signal Response
G = 10RL = 10kΩCL = 100pF
Figure 5-42 Small-Signal Response
INA1H182-SEP Small-Signal Response
G = 1000RL = 10kΩCL = 100pF
Figure 5-44 Small-Signal Response
INA1H182-SEP Differential-Mode EMI Rejection Ratio
 
Figure 5-46 Differential-Mode EMI Rejection Ratio
INA1H182-SEP Input Common-Mode Voltage vs Output Voltage
VS = 5VG = 1
Figure 5-48 Input Common-Mode Voltage vs Output Voltage
INA1H182-SEP Input Common-Mode Voltage vs Output Voltage
VS = ±5VVREF = 0V
Figure 5-50 Input Common-Mode Voltage vs Output Voltage
INA1H182-SEP Input Common-Mode Voltage vs Output Voltage
VS = ±9V, VREF = 0V
Figure 5-51 Input Common-Mode Voltage
vs Output Voltage