SBOSAG3A
March 2024 – December 2024
PGA849
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Gain Control
7.3.2
Input Protection
7.3.3
Using the Output Difference Amplifier to Shape Noise
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.1.1
Linear Operating Input Range
8.1.2
Current Consumption with Differential Inputs
8.2
Typical Applications
8.2.1
Driving a Single-Ended Input SAR ADC
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Application Curves
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Development Support
9.1.1.1
PSpice® for TI
9.1.1.2
TINA-TI™ Simulation Software (Free Download)
9.2
Documentation Support
9.2.1
Related Documentation
9.3
Receiving Notification of Documentation Updates
9.4
Support Resources
9.5
Trademarks
9.6
Electrostatic Discharge Caution
9.7
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2000
V
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002
(2)
±1000
(1)
JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.