SBOSAN5A December   2025  – September 2026 INA1H94-SEP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: INA1H94-SEP
    5. 5.5 Electrical Characteristics: VS = ±9V
    6. 5.6 Electrical Characteristics: V+ = 5V and V– = 0V
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Common-Mode Range
      2. 6.3.2 Error Sources
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 SAR ADC 12B, 8-Channel Battery Cell Voltage Monitor
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Documentation Support
        1. 8.1.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Error Sources

The INA1H94-SEP outperforms discrete difference amplifier implementations using commodity amplifiers and resistors. In discrete designs, individual resistor tolerances compound, increasing common-mode error, gain error, and temperature drift. With typical 0.1% tolerance resistors, a discrete implementation yields lower accuracy than an integrated method with matched thin-film resistor networks. The INA1H94-SEP 's precision-trimmed resistors deliver low gain error and high CMRR. The following error budget analysis highlights the importance of high CMRR when measuring small differential signals in the presence of large common-mode voltages.

Figure 6-6 shows a simplified schematic of the INA1H94-SEP in a battery cell monitoring application. The difference amplifier monitors each cells voltage within a battery pack to assess battery state of health. This example shows a stacked configuration of eight standard lithium-ion cells, with a nominal voltage of 3.7V and a maximum of 4.2V per cell when fully charged. The wide common-mode voltage range of the INA1H94-SEP enables direct interfacing to any cell in the pack without additional isolation circuitry.

INA1H94-SEP Example
                    of INA1H94-SEP in a Battery Cell Monitoring Application Figure 6-6 Example of INA1H94-SEP in a Battery Cell Monitoring Application

The INA1H94-SEP provides very high common-mode rejection, low gain error, and low gain error drift at unity gain (G = 1), owing to the inherently well-matched drift characteristics of its internal resistor network. In battery cell monitoring applications, the discrete difference of the common-mode error of the amplifier becomes a significant error source due to resistor mismatch and drift. In discrete implementations, common-mode and gain errors, along with the associated drift, are by far the largest error contributors compared to all other sources.

The INA1H94-SEP offers excellent gain error and common-mode rejection over temperature.Table 6-1 summarizes the major error sources. All calculations assume a full-scale output voltage of VOUT = 4.2V corresponding to a full-charged battery cell. This example shows the error calculation for cell C7, assuming VDIFF = 4.2V at

Equation 3. V CM = ( 29.4 V + 25.2 V ) / 2 = 27.3 V

Errors are calculated in microvolts and as a percent of the full-scale output voltage for easy comparison and system evaluation.

Table 6-1 shows an example of the INA1H94-SEP stand-alone estimated DC error calculations. This calculation uses typical device specifications to yield an estimate representative of the device expected uncalibrated DC accuracy.

Table 6-1 INA1H94-SEP: Estimated DC Accuracy From Typical Spec at TA = 25°C
Error Source Error Calculation Spec
(Typ)
Error RTI
(µV)
% Error of 4.3V Full-Scale
ABSOLUTE ACCURACY AT 25°C
Input stage offset voltage
VOS
VOS 700µV 700.0µV 0.016%
Gain Error
GE
G E × F u l l S c a l e C e l l 0.025% 1075.0µV 0.025%
Common Mode Voltage

(Batt Cell #7)
VCM
V C M = + I N + ( - I N ) 2 V C M = 29.4 V + ( 25.2 V ) 2 = 27.3 V
Common Mode Rejection Ratio
CMRRERROR
V C M 10 C M R R ( d B ) / 20 ,   V C M = 27.3 V 100dB 273.0µV 0.006%
Power Supply Rejection Ratio
Supply Variation 1.2V
PSRRERROR
V S _ V A R 10 P S R R ( d B ) / 20 ,   V S _ V A R = 1.2 V 120dB 1.2µV 0.000%
CALCULATED TOTAL ERROR AT TA = 25°C USING ROOT-SUM-OF-SQUARES
Total error at 25°C (RSS) V O S 2 + G E 2 + C M R R E R R O R 2 + P S R R E R R O R 2 1311.5µV 0.031%

Table 6-2 shows an example of the INA1H94-SEP worst-case DC error calculation over the extended temperature range. This calculation uses the maximum datasheet device specifications, including the post-TID exposure common-mode rejection, to yield an estimate of the worst-case uncalibrated DC accuracy. In some applications, initial offset error can be readily removed during calibration by measuring the output while shorting the inputs to the common-mode voltage. After performing a null offset calibration, only the offset drift error remains.

Table 6-2 INA1H94-SEP: Estimated DC Accuracy From Maximum Specifications Over Extended Temperature Range
Error Source Error Calculation Spec
(Max)
Error RTI
(µV)
% Error of 4.3V Full-Scale
ABSOLUTE ACCURACY OVERTEMPERATURE TA = –55°C TO +125°C
Input stage offset voltage
VOS
VOS 7500µV 7500.0µV 0.174%
Gain Error
GE
G E × F u l l S c a l e C e l l 0.067% 2881µV 0.067%
Common Mode Voltage

(Batt Cell #7)
VCM
V C M = + I N + ( - I N ) 2 V C M = 29.4 V + ( 25.2 V ) 2 = 27.3 V
Common Mode Rejection Ratio
CMRRERROR
V C M 10 C M R R ( d B ) / 20 ,   V C M = 27.3 V 80dB 2730.0µV 0.063%
Power Supply Rejection Ratio
Supply Variation 1.2V
PSRRERROR
V S _ V A R 10 P S R R ( d B ) / 20 ,   V S _ V A R = 1.2 V 90dB 37.9µV 0.001%
CALCULATED TOTAL ERROR OVERTEMPERATURE TA = –55°C TO +125°C USING ROOT-SUM-OF-SQUARES
Total error at 25°C (RSS) V O S 2 + G E 2 + C M R R E R R O R 2 + P S R R E R R O R 2 8465µV 0.197%