SCAS375K March   1994  – May 2026 SN74LVC4245A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Absolute Maximum Ratings
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Recommended Operating Conditions
    6. 5.6  Thermal Information
    7. 5.7  Electrical Characteristics
    8. 5.8  Electrical Characteristics
    9. 5.9  Switching Characteristics
    10. 5.10 Operating Characteristics
    11. 5.11 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 A Port
    2. 6.2 B Port
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Glitch-free Power Supply Sequencing
    5. 7.5 VCC Isolation and VCC Disconnect
    6. 7.6 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.5 Recommended Operating Conditions

for VCCB = 2.7V to 3.6V(1)
MINMAXUNIT
VCCBSupply voltage2.73.6V
VIHHigh-level input voltageVCCB = 2.7V to 3.6V2V
VILLow-level input voltageVCCB = 2.7V to 3.6V0.8V
VIBInput voltage0VCCBV
VOBOutput voltage0VCCBV
IOHHigh-level output currentVCCB = 2.7V–12mA
VCCB = 3V–24
IOLLow-level output currentVCCB = 2.7V12mA
VCCB = 3V24
TAOperating free-air temperature–4085°C
(1) All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI application note, Implications of Slow or Floating CMOS Inputs.