SCASE82 January   2026 TPUL2T122-Q1 , TPUL2T122A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Thermal Information
    4. 5.4 Electrical Characteristics
    5. 5.5 Recommended Operating Conditions
    6. 5.6 Timing Characteristics
    7.     13
    8. 5.7 Switching Characteristics
    9. 5.8 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 State Machine Description
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Naming Convention
      2. 7.3.2 Retriggerable One-Shot
      3. 7.3.3 Timing Mechanism and Accuracy
      4. 7.3.4 Balanced CMOS Push-Pull Outputs
      5. 7.3.5 CMOS Schmitt-Trigger Inputs
      6. 7.3.6 Latching Logic with Known Power-Up State
      7. 7.3.7 Reduced Input Threshold Voltages
      8. 7.3.8 Wettable Flanks
      9. 7.3.9 Clamp Diode Structure
    4. 7.4 Device Functional Modes
      1. 7.4.1 Off-State Operation
      2. 7.4.2 Startup Operation
      3. 7.4.3 On-State Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application - Edge Detector
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Timing Components
        2. 8.2.1.2 Input Considerations
        3. 8.2.1.3 Output Considerations
        4. 8.2.1.4 Power Considerations
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application - Delayed Pulse Generator
      1. 8.3.1 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.1.1 State Machine Description

The TPUL2T122x-Q1 contains a simple state machine as shown in the State Machine Diagram with only three states: ready, discharge, monitor.

TPUL2T122-Q1 TPUL2T122A-Q1 State Machine Diagram Figure 7-2 State Machine Diagram

In the ready state, the TPUL2T122x-Q1 shorts the RC pin to VCC and holds the digital output inactive.

When triggered, the state machine changes to the discharge state. The digital output is immediately set to active and the device internally shorts the RC pin to ground, discharging the external timing capacitor.

The state machine changes from the discharge state to the monitor state when the RC pin reaches the low reference voltage (Vrefl = 0.25VCC). The RC pin is then set to high impedance, allowing the external timing circuit to naturally charge the timing capacitor back to VCC. When the RC voltage reaches the high reference voltage (Vrefh = 0.69VCC), the state machine returns to the ready state.

Table 7-1 State Descriptions
State Name Inputs Outputs(1)
Trigger VRC ≤ Vrefl VRC ≥ Vrefh CLR RC Q Q
Ready Discharge Ready Ready Ready H L H
Discharge Discharge Monitor Discharge Ready L H L
Monitor Discharge Monitor Ready Ready Z H L
(1) H = Driving high, L = Driving low, Z = High impedance