SCDS034N July   1997  – June 2026 SN74CBTLV3245A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3.   Applications
  4. 2 Description
  5. 3 Pin Configuration and Functions
  6. 4 Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Thermal Information
    4. 4.4 Recommended Operating Conditions
    5. 4.5 Electrical Characteristics - DBQ, DGV, DW, PW and RGY only
    6. 4.6 Electrical Characteristics - RKS and DGS Package only
    7. 4.7 Switching Characteristics - DBQ, DGV, DW, PW and RGY only
    8. 4.8 Switching Characteristics - RKS and DGS Package only
    9. 4.9 Typical Characteristics
  7. 5 Parameter Measurement Information
  8. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
    4. 6.4 Device Functional Modes
  9. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  10. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  11. 9 Revision History
  12. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

7.2.2 Detailed Design Procedure

When OE is high, the active bus. This means that there is a low impedance path between the A and B pins. The 0.1µF capacitor on VCC is a decoupling capacitor and must be placed as close as possible to the device.