SCDS113F December   2002  – September 2026 SN74CB3Q3306A

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Description
  4. 3Pin Configuration and Functions
  5. 4Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 Recommended Operating Conditions
    3. 4.3 ESD Ratings
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics
  6. 5Parameter Measurement Information
  7. 6Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Device Functional Modes
  8. 7Device and Documentation Support
    1. 7.1 Documentation Support
    2. 7.2 Receiving Notification of Documentation Updates
    3. 7.3 Support Resources
    4. 7.4 Trademarks
    5. 7.5 Electrostatic Discharge Caution
    6. 7.6 Glossary
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information

1 Features

  • High-Bandwidth Data Path (up to 500MHz)
  • 5V Tolerant I/Os With Device Powered Up or Powered Down
  • Low and Flat ON-State Resistance (ron)
    Characteristics Over Operating Range
    (ron = 4Ω Typ)
  • Rail-to-Rail Switching on Data I/O Ports
    • 0 to 5V Switching With 3.3V VCC
    • 0 to 3.3V Switching With 2.5V VCC
  • Bidirectional Data Flow With Near-Zero Propagation Delay
  • Low Input and Output Capacitance Minimizes
    Loading and Signal Distortion
    (Cio(OFF) = 3.5pF Typ)
  • Fast Switching Frequency (fOE = 20MHz Max)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 0.25mA Typ)
  • VCC Operating Range From 2.3V to 3.6V
  • Data I/Os Support 0 to 5V Signaling Levels
    (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V, 5V)
  • Control Inputs Can Be Driven by TTL or
    5V/3.3V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 100mA
    Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000V Human-Body Model
      (A114-B, Class II)
    • 1000V Charged-Device Model
      (C101)
  • Supports Both Digital and Analog Applications: USB Interface, Differential Signal Interface, Bus Isolation, Low-Distortion Signal Gating