3.3-V, 1:1 (SPST), 2-channel FET bus switch (active low)
Product details
Parameters
Package | Pins | Size
Features
- High-Bandwidth Data Path (up to 500 MHz(1))
- 5-V-Tolerant I/Os With Device Powered Up or Powered Down
- Low and Flat ON-State Resistance (ron) Characteristics Over
Operating Range (ron = 4 Ω Typ) - Rail-to-Rail Switching on Data I/O Ports
- 0- to 5-V Switching With 3.3-V VCC
- 0- to 3.3-V Switching With 2.5-V VCC
- Bidirectional Data Flow With Near-Zero Propagation Delay
- Low Input/Output Capacitance Minimizes Loading and Signal Distortion
(Cio(OFF) = 3.5 pF Typ) - Fast Switching Frequency (f OE = 20 MHz Max)
- Data and Control Inputs Provide Undershoot Clamp Diodes
- Low Power Consumption (ICC = 0.25 mA Typ)
- VCC Operating Range From 2.3 V to 3.6 V
- Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) - Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
- Supports Both Digital and Analog Applications: USB Interface, Differential Signal
Interface, Bus Isolation, Low-Distortion Signal Gating
(1) For additional information regarding the performance characteristics of the CB3Q family, refer to the TI application report, CBT-C, CB3T, and CB3Q Signal-Switch Families, literature number SCDA008.
Description
The SN74CB3Q3306A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.
The SN74CB3Q3306A is organized as two 1-bit switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is low, the associated 1-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Speed up your op amp prototyping and testing with the DIP-Adapter-EVM, which provides a fast, easy and inexpensive way to interface with small, surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them directly to existing circuits.
The (...)
Features
- Simplifies prototyping of SMT IC’s
- Supports 6 common package types
- Low Cost
Description
The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages. The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.
Features
- Quick testing of TI's leaded surface mount packages
- Allows leaded suface mount packages to be plugged into 100mil spaced bread board
- Supports TI's 8 most popular leaded packages with a single panel
Design tools & simulation
Reference designs
Design files
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download Parallel Redundancy Protocol Ethernet for Substation Automation BOM.pdf (135KB) -
download Parallel Redundancy Protocol Ethernet for Substation Automation Assembly Drawing.pdf (1192KB) -
download Parallel Redundancy Protocol Ethernet for Substation Automation Layer Plots.pdf (1366KB) -
download Parallel Redundancy Protocol Ethernet for Substation Automation CAD Files.zip (3014KB)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
TSSOP (PW) | 8 | View options |
VSSOP (DCU) | 8 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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