SCES538H
January 2004 – August 2026
SN74LVC1G38
PRODUCTION DATA
1
2
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics, CL = 15pF
5.7
Switching Characteristics, CL = 30pF or 50pF, –40°C to +85°C
5.8
Switching Characteristics, CL = 30pF or 50pF, –40°C to +125°C
5.9
Operating Characteristics
5.10
Typical Characteristics
6
Parameter Measurement Information
19
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
High-Drive Open-Drain Output
7.3.2
Standard CMOS Inputs
7.3.3
Clamp Diodes
7.3.4
Partial Power Down (Ioff)
7.3.5
Over-Voltage Tolerant Inputs
7.3.6
Up Translation and Down Translation Capable Outputs
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
1
Features
Latch-up performance exceeds 100mA per JESD 78, Class II
ESD protection exceeds JESD 22
2000V Human-body model (A114A)
200V Machine model (A115A)
1000V Charged-device model (C101)
Available in the Texas Instruments
NanoStar™
and
NanoFree™
packages
Supports 5V V
CC
operation
Inputs accept voltages to 5.5V
Supports down translation to V
CC
Maximum t
pd
of 4.5ns at 3.3V
Low power consumption, 10µA maximum I
CC
±24mA output drive at 3.3V
I
off
supports partial-power-down mode and back-drive protection