SCLS523B August   2003  – February 2025 SN74AC11-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Description
  4. Pin Configuration and Functions
  5. Specifications
    1. 4.1 Absolute Maximum Ratings
    2. 4.2 ESD Ratings
    3. 4.3 Recommended Operating Conditions
    4. 4.4 Thermal Information
    5. 4.5 Electrical Characteristics
    6. 4.6 Switching Characteristics, VCC = 3.3V ± 0.3V
    7. 4.7 Switching Characteristics, VCC = 5V ± 0.5V
    8. 4.8 Operating Characteristics
  6. Parameter Measurement Information
  7. Detailed Description
    1. 6.1 Functional Block Diagram
    2. 6.2 Feature Description
      1. 6.2.1 Standard CMOS Inputs
    3. 6.3 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Layout Example

SN74AC11-Q1 Example Trace Corners for Improved
                                        Signal Integrity Figure 7-1 Example Trace Corners for Improved Signal Integrity
SN74AC11-Q1 Example Bypass Capacitor Placement for TSSOP and
                                                Similar PackagesFigure 7-2 Example Bypass Capacitor Placement for TSSOP and Similar Packages
SN74AC11-Q1 Example Bypass Capacitor Placement for SOT, SC70
                                                and Similar PackagesFigure 7-4 Example Bypass Capacitor Placement for SOT, SC70 and Similar Packages
SN74AC11-Q1 Example Bypass Capacitor Placement for WQFN and
                                                Similar PackagesFigure 7-3 Example Bypass Capacitor Placement for WQFN and Similar Packages
SN74AC11-Q1 Example
                                        Damping Resistor Placement for Improved Signal
                                        Integrity Figure 7-5 Example Damping Resistor Placement for Improved Signal Integrity