SCLS905C August   2022  – June 2026 SN74LV273A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Timing Requirements, VCC = 2.5V ± 0.2V
    7. 5.7  Timing Requirements, VCC = 3.3V ± 0.3V
    8. 5.8  Timing Requirements, VCC = 5V ± 0.5V
    9. 5.9  Switching Characteristics, VCC = 2.5V ± 0.2V
    10. 5.10 Switching Characteristics, VCC = 3.3V ± 0.3 V
    11. 5.11 Switching Characteristics, VCC = 5V ± 0.5V
    12. 5.12 Operating Characteristics
    13. 5.13 Noise Characteristics
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced CMOS Push-Pull Outputs
      2. 7.3.2 Latching Logic
      3. 7.3.3 Partial Power Down (Ioff)
      4. 7.3.4 Wettable Flanks
      5. 7.3.5 Clamp Diode Structure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Power Considerations
      2. 8.2.2 Input Considerations
      3. 8.2.3 Output Considerations
      4. 8.2.4 Detailed Design Procedure
      5. 8.2.5 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

SN74LV273A-Q1 SN74LV273A-Q1 WRKS Package,20-Pin WQFN(Top View)Figure 4-1 SN74LV273A-Q1 WRKS Package,20-Pin WQFN(Top View)
SN74LV273A-Q1 SN74LV273A-Q1 DGS Package,20-Pin VSSOP(Top View)Figure 4-2 SN74LV273A-Q1 DGS Package,20-Pin VSSOP(Top View)
Table 4-1 Pin Functions
PINTYPE(1)DESCRIPTION
NAMENO.
CLR 1 I Clear for all channels, active low
1Q 2 O Output for channel 1
1D 3 I Input for channel 1
2D 4 I Input for channel 2
2Q 5 O Output for channel 2
3Q 6 O Output for channel 3
3D 7 I Input for channel 3
4D 8 I Input for channel 4
4Q 9 O Output for channel 4
GND 10 G Ground
CLK 11 I Clock for all channels, rising edge triggered
5Q 12 O Output for channel 5
5D 13 I Input for channel 5
6D 14 I Input for channel 6
6Q 15 O Output for channel 6
7Q 16 O Output for channel 7
7D 17 I Input for channel 7
8D 18 I Input for channel 8
8Q 19 O Output for channel 8
VCC 20 P Positive supply
Thermal pad—Thermal Pad(2)
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power.
(2) WRKS Package Only