SCPS286A July   2025  â€“ February 2026 TPLD2001

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Supply Current Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 I2C Bus Timing Requirements
    9. 5.9 SPI Timing Requirements
  7. Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  I/O Pins
        1. 8.3.1.1 Input Modes
        2. 8.3.1.2 Output Modes
        3. 8.3.1.3 Pull-Up or Pull-Down Resistors
      2. 8.3.2  Connection Mux
      3. 8.3.3  Configurable Use Logic Blocks
        1. 8.3.3.1 2-Bit LUT or D Flip-Flop/Latch macro-cell
          1. 8.3.3.1.1 2-Bit LUT
          2. 8.3.3.1.2 D Flip-Flop/Latch
        2. 8.3.3.2 2-Bit LUT or Pattern Generator macro-cell
          1. 8.3.3.2.1 2-Bit LUT
          2. 8.3.3.2.2 Pattern Generator
        3. 8.3.3.3 3-Bit LUT or D Flip-Flop/Latch with Reset/Set macro-cell
          1. 8.3.3.3.1 3-bit LUT
          2. 8.3.3.3.2 D Flip-Flop/Latch with Reset/Set
        4. 8.3.3.4 3-Bit LUT or D Flip-Flop/Latch or Shift Register macro-cell
          1. 8.3.3.4.1 3-bit LUT
          2. 8.3.3.4.2 D Flip-Flop/Latch with Reset/Set
          3. 8.3.3.4.3 8-bit Shift Register
        5. 8.3.3.5 4-Bit LUT or D Flip-Flop/Latch with Reset/Set macro-cell
          1. 8.3.3.5.1 4-bit LUT
          2. 8.3.3.5.2 D Flip-Flop/Latch with Reset/Set
      4. 8.3.4  Configurable Logic and Timing blocks
        1. 8.3.4.1 3-bit LUT
        2. 8.3.4.2 D Flip-Flop/Latch with Reset/Set
        3. 8.3.4.3 Counters/Delay Generators (CNT/DLY)
          1. 8.3.4.3.1 Delay Mode
          2. 8.3.4.3.2 Reset Counter Mode
          3. 8.3.4.3.3 One-Shot Mode
          4. 8.3.4.3.4 Frequency Detector Mode
          5. 8.3.4.3.5 Edge Detector Mode
          6. 8.3.4.3.6 Delayed Edge Detector Mode
        4. 8.3.4.4 LUT/DFF + CNT modes
      5. 8.3.5  Programmable Deglitch Filter or Edge Detector
      6. 8.3.6  Deglitch Filter or Edge Detector
      7. 8.3.7  State Machine (SM)
        1. 8.3.7.1 State Machine Inputs
        2. 8.3.7.2 State Machine Outputs
        3. 8.3.7.3 Configuring the State Machine
        4. 8.3.7.4 State Machine Timing Considerations
      8. 8.3.8  8-Bit Counters/Delay Generators/Finite State Machines
      9. 8.3.9  PWM Generators
      10. 8.3.10 Watchdog Timer
      11. 8.3.11 Analog Comparators
        1. 8.3.11.1 Discrete Analog Comparator (ACMP)
        2. 8.3.11.2 Multi-channel Analog Comparator (McACMP)
      12. 8.3.12 Voltage Reference (VREF)
      13. 8.3.13 Analog Temperature Sensor (TS)
      14. 8.3.14 Analog Multiplexer (AMUX)
      15. 8.3.15 Oscillators
        1. 8.3.15.1 2kHz Fixed Frequency Oscillator
        2. 8.3.15.2 2MHz Fixed Frequency Oscillator
        3. 8.3.15.3 25MHz Fixed Frequency Oscillator
        4. 8.3.15.4 Oscillator Power Modes
      16. 8.3.16 Serial Communications
        1. 8.3.16.1 I2C Mode
        2. 8.3.16.2 SPI Mode
        3. 8.3.16.3 Virtual I/Os
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-On Reset
      2. 8.4.2 Power Supply Control Modes
      3. 8.4.3 Protection Features
        1. 8.4.3.1 Device Read/Write Lock
        2. 8.4.3.2 OTP Cyclic Redundancy Check (CRC)
      4. 8.4.4 Programming
        1. 8.4.4.1 Selectable I2C/SPI Interface
        2. 8.4.4.2 Configuration Memory and One-Time Programmable Memory Programming
        3. 8.4.4.3 Intel HEX File Format
        4. 8.4.4.4 TPLD2001 Registers
          1. 8.4.4.4.1 TPLD2001_User Registers
          2. 8.4.4.4.2 TPLD2001_Cfg_0 Registers
          3. 8.4.4.4.3 TPLD2001_Cfg_1 Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Power Considerations
        2. 9.2.1.2 Input Considerations
        3. 9.2.1.3 Output Considerations
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Voltage Reference (VREF)

The TPLD2001 has a voltage reference macro-cell to provide references to the analog comparators. This macro-cell provides a user selection of fixed voltage references from 32mV to 2.016V in 32mV increments or an externally supplied voltage reference from the External VREF AIO can be provided. The External VREF option is shared between all comparators and all channels of the McACMP.

When operating on a VCC less than 2.3V, the maximum VREF option is reduced to VCC - 0.3V; thus, the maximum VREF when operating at 1.8V supply is 1.504V.

The VREF selection per discrete analog comparator or per channel of the multi-channel sampling analog comparator can be updated in-system using the User Registers. For glitch-free measurements, it is recommended to disable/power down all analog comparators when changing the VREF. If the analog comparator is not disabled while the VREF selection is being updated, it may take up to the Analog Comparator tstart for valid data to be output from the analog comparators.

Table 8-23 VREF Selection Table

Bit Enumeration

VREF output

000000 32mV
000001 64mV
000010 96mV
000011 128mV
000100 160mV
000101 192mV
000110 224mV
000111 256mV
001000 288mV
001001 320mV
001010 352mV
001011 384mV
001100 416mV
001101 448mV
001110 480mV
001111 512mV
010000 544mV
010001 576mV
010010 608mV
010011 640mV
010100 672mV
010101 704mV
010110 736mV
010111 768mV
011000 800mV
011001 832mV
011010 864mV
011011 896mV
011100 928mV
011101 960mV
011110 992mV
011111 1024mV
100000 1056mV
100001 1088mV
100010 1120mV
100011 1152mV
100100 1184mV
100101 1216mV
100110 1248mV
100111 1280mV
101000 1312mV
101001 1344mV
101010 1376mV
101011 1408mV
101100 1440mV
101101 1472mV
101110 1504mV
101111 1536mV
110000 1568mV
110001 1600mV
110010 1632mV
110011 1664mV
110100 1696mV
110101 1728mV
110110 1760mV
110111 1792mV
111000 1824mV
111001 1856mV
111010 1888mV
111011 1920mV
111100 1952mV
111101 1984mV
111110 2016mV
111111 Ext. VREF AIO
Table 8-24 VREF Range
VCC VREF Range
1.71V - 2.3V 32mV - 1.504V

2.3V - 5.5V

32mV - 2.016V