SCPS317 June   2026 TXE8148

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 SPI Bus Timing Requirements
    8. 5.8 Switching Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 I/O Port
      2. 7.3.2 Interrupt Output (INT)
      3. 7.3.3 Reset Input (RESET)
      4. 7.3.4 Bus Hold
      5. 7.3.5 Fail-safe Mode
      6. 7.3.6 Software Reset Call
      7. 7.3.7 Daisy Chain
      8. 7.3.8 Feature Register Mapping
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 SPI
      2. 7.5.2 SPI Data Format
      3. 7.5.3 Burst Mode
      4. 7.5.4 SPI Write
      5. 7.5.5 SPI Read
      6. 7.5.6 SPI Daisy Chain
    6. 7.6 TXE8148 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power-On Reset Requirements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

1 Features

  • Functional Safety-Capable
  • Operating supply voltage range of 1.65V to 5.5V
  • Low standby current consumption of 6µA typical
  • 10MHz SPI SCLK frequency
  • SPI daisy-chain supported
  • SPI read and write with burst mode
  • Multi-port SPI command to configure multiple ports simultaneously
  • IOFF supported input port pins
  • Active-low reset input (RESET)
  • Open-drain active-low interrupt output (INT)
    • Interrupt mask and status per I/O
    • Interrupt status per port
  • Built-in fail safe I/O feature
  • Individual I/O configuration for:
    • Input and output function
    • Polarity inversion
    • Output push-pull and open-drain selection
    • Integrated pullup or pulldown selection
    • Bus-hold feature to maintain last I/O state
    • Glitch filter enable selection
  • Latched outputs with 10mA drive capability for directly driving LEDs
  • Latch-up performance exceeds 100mA per AEC Q100-004
  • Latch-up performance exceeds 100mA per JESD 78, class II