2 What is SPI Daisy Chaining?

SPI daisy chaining is a connection scheme used to communicate with multiple SPI peripheral devices in series. Daisy chaining reduces the amount of wire/trace length needed and saves GPIO on the MCU for multiple chip selects.

In a normal SPI configuration of multiple peripherals, a chip select signal is required for each SPI peripheral device. This means a GPIO from the MCU must be reserved for each SPI peripheral in the system. See the example below of a normal SPI configuration between 4 peripheral devices.

Figure 2-1 Example of the SPI Bus without Daisy Chain

Eight pins from the MCU are needed to control 4 SPI peripheral devices. PICO from the MCU is connected to all serial data inputs (SDI). MISO is connected to the serial data outputs (SDO). The clock pin (SCLK) is shared amongst all devices in the system. An individual chip select must be dedicated to each peripheral in the system.

The normal implementation of SPI requires multiple GPIO pins from the MCU of which can be limited in certain systems. This also means that the system uses more wiring to route each chip select to each peripheral device. This can mean more physical wiring and therefore added weight in a system, or a more cluttered PCB.

To solve these two problems of reducing wiring and the number of chip select lines required, a SPI daisy chain connection scheme can be implemented. SPI daisy chain must be supported by the IC device manufacturer for this to work.

Figure 2-2 Example SPI Bus with Daisy Chaining.

(Note: SDO is connected to SDI, only one chip select signal is used)

The daisy chain implementation streamlines the serial data by connecting the output from one peripheral to the input of another. In this case, the wiring can be reduced drastically since the routing does not need to come from the MCU, but can be "chained" to each peripheral in the sequence.