SDAA225A January   2026  – April 2026 LMX2594

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2VCO Basic Theory and Key Factors
    1. 2.1 VCO
    2. 2.2 VCO Frequency Range
    3. 2.3 Phase Noise
  6. 3CMOS LC VCO Design
    1. 3.1 PLL Structure
    2. 3.2 LC VCO Structure and Operation
    3. 3.3 Each Circuit and Block Operation
      1. 3.3.1 Tuning Varactor Bias Circuit
      2. 3.3.2 7 Bit MIM Capacitor Bank
    4. 3.4 Simulation
    5. 3.5 Implementation and Measurement Results
      1. 3.5.1 Layout
      2. 3.5.2 Fabrication and Measurement Results
  7. 4Summary
  8. 5References
  9. 6Revision History

3.3.2 7 Bit MIM Capacitor Bank

Figure 3-1 shows a binary-weighted 7-bit MIM capacitor structure. The 7-bit MIM capacitor array occupies a larger area than a lower-bit MIM capacitor array, but the frequency range required per bit narrows, resulting in a lower KVCO value. Therefore, in a VCO where phase noise is a critical factor, a lower KVCO value can also improve phase noise.

Binary Weighted 7 Bit MIM Capacitor Array Figure 3-4 Binary Weighted 7 Bit MIM Capacitor Array