SDAA225A January   2026  – April 2026 LMX2594

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2VCO Basic Theory and Key Factors
    1. 2.1 VCO
    2. 2.2 VCO Frequency Range
    3. 2.3 Phase Noise
  6. 3CMOS LC VCO Design
    1. 3.1 PLL Structure
    2. 3.2 LC VCO Structure and Operation
    3. 3.3 Each Circuit and Block Operation
      1. 3.3.1 Tuning Varactor Bias Circuit
      2. 3.3.2 7 Bit MIM Capacitor Bank
    4. 3.4 Simulation
    5. 3.5 Implementation and Measurement Results
      1. 3.5.1 Layout
      2. 3.5.2 Fabrication and Measurement Results
  7. 4Summary
  8. 5References
  9. 6Revision History

3.5.1 Layout

Figure 3-3 shows the layout of the designed chip. Since the cross-coupled LC VCO outputs a differential frequency signal, symmetry was considered in the design. The variable-capacitance diode bank, MIM capacitor bank, and transistor were connected in this order, starting directly below the LC tank inductor. Additionally, the digital control and current control sections were placed to the right of the VCO.

VCO and LOGEN Layout Figure 3-7 VCO and LOGEN Layout