Original MAIN ICT program conducts the following:

1. A side to B side test
   1. Drive patterns on (SDAA and SCLA, measure output on SDAB and SCLB)
   2. 00 / 01 / 10 / 11, SDAA = 0, SCLA = 0, next SDAA = 0, SCLA = 1 ...
2. B side to A side test
   1. Drive patterns on (SDAB and SCLB, measure output on SDAA and SCLA)
   2. 00 / 01 / 10 / 11, SDAB = 0, SCLA = 0, next SDAB = 0, SCLB = 1 ...
3. In both tests, measure the correct output pattern (00 / 01 / 10 /11)

The tester then verified functionality by reading back the corresponding pattern on the opposite side of the device. During testing, the ICT system actively drove both logic-high and logic-low states with strong edge-rate transitions.

From a hardware setup, series resistors were not connected on channels SDAA, SCLA, SDAB, and SCLB.