Product details

Features Buffer, Enable Pin Frequency (Max) (kHz) 1000 VCCA (Min) (V) 0.8 VCCA (Max) (V) 5.5 VCCB (Min) (V) 2.2 VCCB (Max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (C) -40 to 85
Features Buffer, Enable Pin Frequency (Max) (kHz) 1000 VCCA (Min) (V) 0.8 VCCA (Max) (V) 5.5 VCCB (Min) (V) 2.2 VCCB (Max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (C) -40 to 85
VSSOP (DGK) 8 15 mm² 3 x 4.9
  • Two-Channel Bidirectional I2C Buffer
  • Support for Standard Mode, Fast Mode (400 kHz), and Fast Mode+ (1 MHz) I2C Operation
  • Operating Supply Voltage Range of 0.8 V to 5.5 V on A-Side
  • Operating Supply Voltage Range of 2.2 V to 5.5 V on B-Side
  • Voltage-Level Translation From 0.8 V to 5.5 V and 2.2 V to 5.5 V
  • Footprint and Function Replacement for TCA9517
  • Active-High Repeater-Enable Input
  • Open-Drain I2C I/O
  • 5.5-V Tolerant I2C and Enable Input Support
  • Lockup-Free Operation
  • Powered-Off High-Impedance I2C Bus Pins
  • Support for Clock Stretching and Multiple Master Arbitration Across The Device
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model (A114-A)
    • 1500-V Charged-Device Model (C101)
  • Two-Channel Bidirectional I2C Buffer
  • Support for Standard Mode, Fast Mode (400 kHz), and Fast Mode+ (1 MHz) I2C Operation
  • Operating Supply Voltage Range of 0.8 V to 5.5 V on A-Side
  • Operating Supply Voltage Range of 2.2 V to 5.5 V on B-Side
  • Voltage-Level Translation From 0.8 V to 5.5 V and 2.2 V to 5.5 V
  • Footprint and Function Replacement for TCA9517
  • Active-High Repeater-Enable Input
  • Open-Drain I2C I/O
  • 5.5-V Tolerant I2C and Enable Input Support
  • Lockup-Free Operation
  • Powered-Off High-Impedance I2C Bus Pins
  • Support for Clock Stretching and Multiple Master Arbitration Across The Device
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 4000-V Human-Body Model (A114-A)
    • 1500-V Charged-Device Model (C101)

The TCA9617B is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. It can provide bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8 V) and higher voltages (2.2 V to 5.5 V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9617B buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550 pF to be connected in an I2C application. This device can also be used to isolate two halves of a bus for voltage and capacitance.

The TCA9617B is a BiCMOS dual bidirectional buffer intended for I2C bus and SMBus systems. It can provide bidirectional voltage-level translation (up-translation and down-translation) between low voltages (down to 0.8 V) and higher voltages (2.2 V to 5.5 V) in mixed-mode applications. This device enables I2C and similar bus systems to be extended, without degradation of performance even during level shifting.

The TCA9617B buffers both the serial data (SDA) and the serial clock (SCL) signals on the I2C bus, allowing two buses of 550 pF to be connected in an I2C application. This device can also be used to isolate two halves of a bus for voltage and capacitance.

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Technical documentation

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Type Title Date
* Data sheet TCA9617B Level-Translating FM+ I2C Bus Repeater datasheet (Rev. B) 05 Dec 2018
Application note Why, When, and How to use I2C Buffers 23 May 2018
Technical article Intro to I2C: what the Internet doesn’t tell you 24 Nov 2016
Application note Choosing the Correct I2C Device for New Designs 07 Sep 2016
Selection guide I2C Infographic Flyer 03 Dec 2015
Technical article How to simplify I2C tree when connecting multiple slaves to an I2C master 15 Oct 2015
Application note Understanding the I2C Bus 30 Jun 2015
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 15 May 2015
Application note I2C Bus Pull-Up Resistor Calculation 13 Feb 2015

Design & development

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Simulation model

TCA9617B IBIS MODEL

SCPM039.ZIP (40 KB) - IBIS Model
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I2C-DESIGNER — I2C designer tool

Use the I2C Designer tool to quickly resolve conflicts in addressing, voltage level and frequency in I2C based designs. Enter master and slave inputs to automatically generate an I2C tree or easily build a custom solution. This tool will help designers save time and comply with the I2C standard (...)
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