SDAA393 June   2026 AM2431 , AM2432 , AM2434

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Functional Safety Fundamentals
    1. 1.1 What is Functional Safety
    2. 1.2 Causality Chain from Fault to Harm
    3. 1.3 Core Problems Addressed by Functional Safety
  5. 2Safety Standards and Grade Classification
    1. 2.1 Major Safety Standard Systems
    2. 2.2 Functional Safety in Industrial Communication (FSoE)
    3. 2.3 Safety Grade Indicator System
      1. 2.3.1 IEC 61508 - Safety Integrity Level (SIL)
      2. 2.3.2 ISO 13849-1 - Performance Level (PL) and Category (CAT)
  6. 3System Safety Goal Decomposition
    1. 3.1 HARA Process and Safety Goal Definition
    2. 3.2 Safety Goal Decomposition and ASIL/SIL Assignment
    3. 3.3 Concrete Application of System-Level Decomposition
    4. 3.4 Role and Responsibility Division
  7. 4TI Chip Safety Architecture
    1. 4.1 MCU-Level Safety Architecture
    2. 4.2 Integrated Safety Mechanisms/Technology in TI MCU/MPU
      1. 4.2.1 Freedom From Interference (FFI) Design
      2. 4.2.2 Memory Protection and ECC Technology
      3. 4.2.3 Other Integrated Safety Mechanisms
  8. 5Functional Safety PLC Architecture Design
    1. 5.1 Necessity and Application Scenarios of Functional Safety PLC
    2. 5.2 Functional Safety PLC Architecture Design
    3. 5.3 Design Implementation Cases
    4. 5.4 TI Functional Safety Design Resources
  9. 6Summary
  10. 7References

Freedom From Interference (FFI) Design

FFI is the key technology when running different safety-level tasks on a single SoC. It can eliminate

cascading failures and dependencies between different ASIL/SIL level components, anc ensure that low-level component failures do not propagate to high-level safety islands.

 FFI Implementation in TI MCU/MPU Figure 4-4 FFI Implementation in TI MCU/MPU

FFI external side: Non-Safe Domain - Standard applications, communication, non-critical tasks

FFI internal side: Safety Island - Safety-critical tasks, independent R5F or M4F core

FFI Isolation mechanisms:

  • Firewall (Firewall) - Controlling bus access
  • Timeout Gaskets (Timeout Gaskets) - Protecting communication paths
  • Independent clock/power/reset
  • Dedicated interrupt control

Bidirectional arrows: Controlled interfaces (SPI/I2C) for necessary communication

Status indicator: Safety island can independently monitor and restart non-safe domain.

FFI Benefits

  • Cost Optimization: Integrate multiple safety-level functions in single MCU, reducing total BOM
  • Integration Level: No need for separate external safety MCU
  • System Complexity: Reduce integration difficulty and test effort