Product details

CPU Arm Cortex-R5F Frequency (MHz) 800 ADC 12-bit SAR GPIO 148, 198 UART 7, 9 Number of I2Cs 2, 6 Features Integrated industrial protocols, Profinet, EtherNet/IP, EtherCAT Operating temperature range (C) -40 to 105
CPU Arm Cortex-R5F Frequency (MHz) 800 ADC 12-bit SAR GPIO 148, 198 UART 7, 9 Number of I2Cs 2, 6 Features Integrated industrial protocols, Profinet, EtherNet/IP, EtherCAT Operating temperature range (C) -40 to 105
FCBGA (ALV) 441 FCCSP (ALX) 293

Processor cores:

  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800 MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB ICache and 32KB DCache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU subsystem at up to 400 MHz
    • 256KB SRAM with SECDED ECC

Memory subsystem:

  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s

Industrial subsystem:

  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU_ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× 10/100/1000 Ethernet ports
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta filters
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • One Enhanced Capture Module (ECAP)
      • 16550-compatible UART with a
        • Dedicated 192-MHz clock to support 12-Mbps PROFIBUS

System on Chip (SoC) Services:

  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)

    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers

Security:

  • Secure Boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Support for cryptographic acceleration
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
    • Supports cryptographic cores
      • AES – 128/192/256 Bits key sizes
      • 3DES – 56/112/168 Bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • DRBG with true random number generator
      • PKA (Public Key Accelerator) to Assist in RSA/ECC processing
    • DMA support
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure DMA Path and Interconnect
    • Secure watchdog/timer/IPC
  • Secure storage support
  • On-the-Fly encryption (OTFE) support for OSPI interface in XIP mode
  • Networking security support for data (Payload) encryption/authentication via packet based hardware cryptographic engine
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security

High-speed serial interfaces:

  • 1× Integrated Ethernet switch supporting up to 2 external ports (CPSW3G)
    • Up to 2 RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 operation
    • Supports Single Lane operation
  • 1× USB 3.1-Gen1 Dual-role Device (DRD) Subsystem (USBSS)
    • One shared USBSS port for enhanced SuperSpeed Gen1 or USB 2.0
    • Port configurable as USB host, USB peripheral, or USB Dual-role Device
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES lane to support PCI-Express Gen2 and USB SuperSpeed Gen1

General connectivity peripherals:

  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× configurable Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Up to 4 MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (MCSPI) controllers
  • 3× General-Purpose I/O (GPIO) modules

Industrial and control interfaces:

  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSI_TX) cores
  • 6× Fast Serial Interface Receiver (FSI_RX) cores

Memory controllers:

  • 2× MultiMedia Card/Secure Digital (MMC/SD) interfaces
    • One 4-bit for SD/SDIO
    • One 8-bit for eMMC
    • Integrated analog switch for voltage switching between 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133 MHz clock or
    • 32-bit parallel bus with 100 MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) that can be configured as Octal SPI (OSPI) flash interfaces or one Quad SPI (QSPI)

Power Management:

  • Simplified power sequence
  • Dual-voltage I/O Support
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for safety monitoring of over-under voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional Safety:

  • Functional Safety-Compliant Targeted
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2 targeted for MCU domain
    • Quality-managed MAIN Domain
    • Safety-related certification
      • IEC 61508 certification planned
    • ECC or parity on calculation-critical memories
    • ECC and parity on select internal bus interconnects
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with external error pin
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU Domain with dedicated memory, interfaces, and M4FSS capable of being isolated from the larger SoC with Freedom From Interference (FFI) features
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Dedicated PLL
      • Dedicated I/O supply
      • Separate reset

SoC Architecture:

  • Supports primary boot from UART, I2C, OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, SD, eMMC, USB 2.0, PCIe, and Ethernet interfaces
  • 16-nm FinFET technology

Package options:

  • ALV FCBGA (441-pin) (Lidded) Flip-Chip Ball Grid Array package, 17.2 mm × 17.2 mm, 0.8-mm pitch
  • ALX FC/CSP (293-pin) (SiP) Flip-Chip Chip Scale Package package, 11 mm × 11 mm, 0.5-mm pitch

Processor cores:

  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems operating at up to 800 MHz, highly-integrated for real-time processing
    • Dual-core Arm Cortex-R5F clusters support dual-core and single-core operation
    • 32KB ICache and 32KB DCache per R5F core with SECDED ECC on all memories
    • Single-core: 128KB TCM per cluster (128KB TCM per R5F core)
    • Dual-core: 128KB TCM per cluster (64KB TCM per R5F core)
  • 1× Single-core Arm Cortex-M4F MCU subsystem at up to 400 MHz
    • 256KB SRAM with SECDED ECC

Memory subsystem:

  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s

Industrial subsystem:

  • 2× Gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Optional support for Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and other Networking Protocols
    • Backwards compatibility with 10/100Mb PRU_ICSS
    • Each PRU_ICSSG contains:
      • 3× PRU RISC Cores per Slice (2× Slice per PRU_ICSSG)
        • PRU General Use core (PRU)
        • PRU Real-Time Unit core (PRU-RTU)
        • PRU Transmit core (PRU-TX)
      • Each PRU core supports the following features:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Up to 2× 10/100/1000 Ethernet ports
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • 2× 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta filters
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • One Enhanced Capture Module (ECAP)
      • 16550-compatible UART with a
        • Dedicated 192-MHz clock to support 12-Mbps PROFIBUS

System on Chip (SoC) Services:

  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
    • On-Chip Debug functionality through JTAG and Trace interfaces)
  • Data Movement Subsystem (DMSS)

    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)
  • Time Sync Subsystem
    • Central Platform Time Sync (CPTS) module
    • Timer Manager (TIMERMANAGER) with 1024 timers
    • Time Sync and Compare event interrupt routers

Security:

  • Secure Boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Support for cryptographic acceleration
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
    • Supports cryptographic cores
      • AES – 128/192/256 Bits key sizes
      • 3DES – 56/112/168 Bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • DRBG with true random number generator
      • PKA (Public Key Accelerator) to Assist in RSA/ECC processing
    • DMA support
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure DMA Path and Interconnect
    • Secure watchdog/timer/IPC
  • Secure storage support
  • On-the-Fly encryption (OTFE) support for OSPI interface in XIP mode
  • Networking security support for data (Payload) encryption/authentication via packet based hardware cryptographic engine
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security

High-speed serial interfaces:

  • 1× Integrated Ethernet switch supporting up to 2 external ports (CPSW3G)
    • Up to 2 RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 operation
    • Supports Single Lane operation
  • 1× USB 3.1-Gen1 Dual-role Device (DRD) Subsystem (USBSS)
    • One shared USBSS port for enhanced SuperSpeed Gen1 or USB 2.0
    • Port configurable as USB host, USB peripheral, or USB Dual-role Device
    • Integrated USB VBUS detection
  • 1× Serializer/Deserializer (SERDES)
    • One SERDES lane to support PCI-Express Gen2 and USB SuperSpeed Gen1

General connectivity peripherals:

  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× configurable Universal Asynchronous Receive/Transmit (UART) modules
  • 1× 12-bit Analog-to-Digital Converters (ADC)
    • Up to 4 MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (MCSPI) controllers
  • 3× General-Purpose I/O (GPIO) modules

Industrial and control interfaces:

  • 9× Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with full CAN-FD support
  • 2× Fast Serial Interface Transmitter (FSI_TX) cores
  • 6× Fast Serial Interface Receiver (FSI_RX) cores

Memory controllers:

  • 2× MultiMedia Card/Secure Digital (MMC/SD) interfaces
    • One 4-bit for SD/SDIO
    • One 8-bit for eMMC
    • Integrated analog switch for voltage switching between 3.3V to 1.8V for high-speed cards
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-bit parallel bus with 133 MHz clock or
    • 32-bit parallel bus with 100 MHz clock
    • Error Location Module (ELM) support
  • 1× Flash Subsystem (FSS) that can be configured as Octal SPI (OSPI) flash interfaces or one Quad SPI (QSPI)

Power Management:

  • Simplified power sequence
  • Dual-voltage I/O Support
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for safety monitoring of over-under voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional Safety:

  • Functional Safety-Compliant Targeted
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2 targeted for MCU domain
    • Quality-managed MAIN Domain
    • Safety-related certification
      • IEC 61508 certification planned
    • ECC or parity on calculation-critical memories
    • ECC and parity on select internal bus interconnects
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with external error pin
    • Run-time safety diagnostics, including:
      • Voltage, Temperature, and Clock Monitoring
      • Windowed Watchdog Timers
      • CRC Engine for memory integrity checks
    • MCU Domain with dedicated memory, interfaces, and M4FSS capable of being isolated from the larger SoC with Freedom From Interference (FFI) features
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Dedicated PLL
      • Dedicated I/O supply
      • Separate reset

SoC Architecture:

  • Supports primary boot from UART, I2C, OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, SD, eMMC, USB 2.0, PCIe, and Ethernet interfaces
  • 16-nm FinFET technology

Package options:

  • ALV FCBGA (441-pin) (Lidded) Flip-Chip Ball Grid Array package, 17.2 mm × 17.2 mm, 0.8-mm pitch
  • ALX FC/CSP (293-pin) (SiP) Flip-Chip Chip Scale Package package, 11 mm × 11 mm, 0.5-mm pitch

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs and one Cortex-M4F.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, PWMs, sigma delta decimation filters, and absolute encoder interfaces help enable a number of different architectures found in these systems.

The PRU-ICSSG in AM243x provides the flexible industrial communications capability necessary to run gigabit TSN, EtherCAT, PROFINET, EtherNet/IP, and various other protocols. In addition, the PRU-ICSSG also enables additional interfaces in the SoC including sigma delta decimation filters and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with its dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.

AM243x is an extension of Sitara’s industrial-grade portfolio into high-performance microcontrollers. The AM243x device is built for industrial applications, such as motor drives and remote I/O modules, which require a combination of real-time communications and processing. The AM243x family provides scalable performance with up to four Cortex-R5F MCUs and one Cortex-M4F.

The AM243x SoC architecture was designed to provide best-in-class real-time performance through the high-performance Arm Cortex-R5F cores, Tightly-Coupled Memory banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM243x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, PWMs, sigma delta decimation filters, and absolute encoder interfaces help enable a number of different architectures found in these systems.

The PRU-ICSSG in AM243x provides the flexible industrial communications capability necessary to run gigabit TSN, EtherCAT, PROFINET, EtherNet/IP, and various other protocols. In addition, the PRU-ICSSG also enables additional interfaces in the SoC including sigma delta decimation filters and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with its dedicated peripherals which can all be isolated from the rest of the SoC. AM243x also supports secure boot.

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Technical documentation

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Type Title Date
* Data sheet AM243x Sitara™ Microcontrollers datasheet (Rev. B) 16 Jul 2021
* Errata AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. C) 22 Dec 2021
White paper Industry 4.0 서보 드라이브에 Sitara™ 프로세서 및 마이크로컨트롤러 활용 (Rev. C) 12 Jan 2022
White paper 運用適合工業 4.0 Sitara™ 伺服驅動器的處理器與微控制器 (Rev. C) 12 Jan 2022
White paper Utilizing Sitara Processors and Microcontrollers for Industry 4.0 Servo Drives (Rev. C) 06 Oct 2021
Application note Industrial Communication Protocols Supported on Sitara™ Processors (Rev. D) 30 Sep 2021
User guide AM64x/AM243x Technical Reference Manual (Rev. C) 22 Sep 2021
Application note AM64x/AM243x Schematic Review Checklist (Rev. B) 20 Aug 2021
User guide AM64x/AM243x GP EVM User's Guide (Rev. D) 09 Aug 2021
Technical article 5 ways high-performance MCUs are reshaping the industry 12 Jul 2021
White paper Revolutionizing Real-Time Control, Networking and Analytics w/ Sitara™ AM2x MCUs 07 Jul 2021
Application note AM64x/AM243x DDR Board Design and Layout Guidelines (Rev. A) 01 Jul 2021
Application note AM64x/AM243x Power Estimation Tool (Rev. A) 01 Jul 2021
More literature LaunchPad™ kit with Sitara™ AM243x MCU Pinout Map 18 Jun 2021
White paper Sitara™ AM2x MCU를 통한 실시간 제어, 네트워킹 및 분석 성능 혁신 13 Jun 2021
White paper 以 Sitara™ AM2x MCU 顛覆即時控制、網路與分析效能 13 Jun 2021
User guide AM64x/AM243x BGA Escape Routing (Rev. A) 06 Apr 2021
Application note High-Speed Interface Layout Guidelines (Rev. H) 11 Oct 2018

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LP-AM243 — AM243x Arm-based MCU general purpose LaunchPad development kit

LP-AM243 is a low-cost development board for TI Sitara™ high performance microcontrollers from the AM243x series. This board is ideal for initial evaluation and prototyping as it provides a standardized and easy-to-use platform to develop your next application. The LP-AM243 is equipped with a (...)

In stock
Limit: 8
Evaluation board

TMDS243DC01EVM — AM243x & AM64x evaluation module breakout board for high-speed expansion

The AM243x High Speed Expansion board is an add-on module for the AM243x GP EVM.  This board includes a general purpose signal breakout that provides test access to all the IO signals included on the High Speed Expansion connector from the AM243x EVM.  The breakout board has a 150 pin (...)
In stock
Limit: 2
Evaluation board

TMDS243GPEVM — AM243x Arm-based MCU general purpose evaluation module

The AM243x EVM is a standalone test, development, and evaluation module (EVM) that lets developers evaluate AM243x's functionality and develop prototypes for a variety of applications.

The EVM is equipped with a Sitara™ AM2434 processor along with additional components to allow the user to (...)

In stock
Limit: 2
Evaluation board

TQ-3P-SITARASOMS — TQ Group system on modules for TI Arm-based processors and microcontrollers

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
From: TQ-Group
Development kit

PHYTC-3P-SOMS — PHYTEC system on modules for TI ARM-based Processors and Microcontrollers

PHYTEC is an industry-leading provider and integrator of System on Modules (SOMs), embedded middleware and design services that enable customers to bring complex products quickly and easily to market. They guide customers from design to production utilizing deep domain expertise; high-quality (...)

From: PHYTEC
Software development kit (SDK)

MCU-PLUS-SDK-AM243X — Software Development Kit for AM243x Sitara™ microcontrollers

The MCU+ SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to examples, benchmarks and demos.  This software accelerates application development schedules by eliminating the need to create basic system (...)
IDE, configuration, compiler or debugger

SYSCONFIG — System configuration tool

To help simplify configuration challenges and accelerate software development, we created SysConfig, an intuitive and comprehensive collection of graphical utilities for configuring pins, peripherals, radios, subsystems, and other components.  SysConfig helps you manage, expose and resolve (...)
IDE, configuration, compiler or debugger

IAR-KICKSTART — IAR Embedded Workbench

IAR Embedded Workbench delivers a complete development toolchain for building and debugging embedded applications for your selected target microcontroller. The included IAR C/C++ Compiler generates highly optimized code for your application, and the C-SPY Debugger is a fully integrated debugger for (...)
From: IAR Systems
IDE, configuration, compiler or debugger

KUNBUS-3P-INDUSTRIALCOMMS — KUNBUS - A Single Source for Multiprotocol Industrial Communications

KUNBUS is a German-based company specializing in industrial communication. KUNBUS is the ideal partner for industrial communication because KUNBUS offers pre-certified protocol solutions on Sitara™ processors as well as a full suite of additional services to meet the customer's needs.

Common (...)

From: KUNBUS
Support software

AM243x SW Build Sheet

SPRCAJ9.ZIP (21 KB)
Simulation model

AM64x/AM243x IBIS Model (Rev. A)

SPRM730A.ZIP (2225 KB) - IBIS Model
Simulation model

AM64x/AM243x BSDL Model

SPRM732.ZIP (21 KB) - BSDL Model
Simulation model

AM64x/AM243x Thermal Model

SPRM773.ZIP (2 KB) - Thermal Model
Simulation model

AM64x Power Estimation Tool

SPRM779.ZIP (96 KB) - Power Model
Simulation model

AM243x BSDL Model

SPRM781.ZIP (17 KB) - BSDL Model
Simulation model

AM243x Thermal Model

SPRM782.ZIP (1 KB) - Thermal Model
Simulation model

AM243x IBIS model

SPRM783.ZIP (554 KB) - IBIS Model
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
Package Pins Download
FCBGA (ALV) 441 View options
FCCSP (ALX) 293 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

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