SDAA423 August   2026 AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2SERDES PLL SSC - Linux SDK Configuration
    1. 2.1 DTS Configuration for SSC
    2. 2.2 DTS Compiling
    3. 2.3 Device Tree Blob (DTB) Copy to SKEVM Boot-Up SD Card
  6. 3Low-Frequency Periodic Signaling (LFPS)
  7. 4CP0 - CP1 Transmission Pattern Setup
  8. 5Summary
  9. 6References

2.1 DTS Configuration for SSC

The AM64x USB3.0 physical interface natively supports SSC, but Linux SDK Version: 12.00.00.07.04 and predecessors do not have SSC enabled by default. This miss is likely due to the need to bypass SERDES PLL SSC for early silicon bring-up activities. In the processor Linux SDK, the integration of the AM64x USB3.0 subsystem is handled via the Device Tree Source (DTS) configuration. To enable SSC for the USB3.0 SERDES PLL on the SK-AM64B Starter Kit board, the k3-am642-sk.dts at the below location needs to be modified.

<SDK_INSTALL_DIR>/board-support/ti-linux-kernel-<version>/arch/arm64/boot/dts/ti/k3-am642-sk.dts

As per the USB 3.0 specifcation, USB 3.1 Gen 1 SSC requirements specify a modulation rate between 30 and 33 kHz, a triangular-shaped modulation, and a downspread modulation depth between 0.4% and 0.5% as shown in the figure below.


5Gbps Carrier Frequency with SSC Modulation

Figure 2-1 5Gbps Carrier Frequency with SSC Modulation

To implement these changes, the below code needs to be added to the SERDES wizard wrapper (WIZ) node &serdes_wiz0 in the DTS.

ti,core-clk-sel = <1>;   /* Select internal ref clock */ 
ti,ssc-enable;     /* Enable SSC */ 
ti,ssc-type = <1>;  /* 1 for Downspread */ 
ti,ssc-frequency-hz = <33000>; /* 33kHz fmod */
ti,ssc-depth-per-mil = <5>; /* 0.5% depth */

The below also needs to be added to the serdes0_usb_link: phy@0 node.

cdns,ssc-mode = <2>;   /* 2 for SSC enabled (internal) */

The below figure shows the updated configuration that enables SSC using triangular-shape SSC modulation profile with down spread modulation output.


DTS Changes to Enable SERDES PLL SSC for USBSS

Figure 2-2 DTS Changes to Enable SERDES PLL SSC for USBSS