Product details

Arm CPU 2 Arm Cortex-A53 Arm MHz (Max.) 800, 1000 Co-processor(s) 1 Arm Cortex-R5F, PRU-ICSS CPU 64-bit Protocols EtherCAT, Ethernet, EtherNet/IP, Profinet, Sercos, Profibus Ethernet MAC 2-Port 10/100/1000 PCIe 1 PCIe Gen 2 Hardware accelerators PRU-ICSSG, Security Accelerator Features Networking Operating system Linux, RTOS Security Cryptography, Debug security, Secure boot, Trusted execution environment Rating Catalog Operating temperature range (C) -40 to 105
Arm CPU 2 Arm Cortex-A53 Arm MHz (Max.) 800, 1000 Co-processor(s) 1 Arm Cortex-R5F, PRU-ICSS CPU 64-bit Protocols EtherCAT, Ethernet, EtherNet/IP, Profinet, Sercos, Profibus Ethernet MAC 2-Port 10/100/1000 PCIe 1 PCIe Gen 2 Hardware accelerators PRU-ICSSG, Security Accelerator Features Networking Operating system Linux, RTOS Security Cryptography, Debug security, Secure boot, Trusted execution environment Rating Catalog Operating temperature range (C) -40 to 105

Processor cores:

  • 1× Dual 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.0 GHz
    • Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC
    • Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems at at up to 800 MHz, integrated for real-time processing
    • Dual-core Arm Cortex-R5F supports dual-core and single-core modes
    • 32KB ICache, 32KB DCache and 64KB TCM per each R5F core for a total of 256KB TCM with SECDED ECC on all memories
  • 1× Single-core Arm Cortex-M4F MCU at up to 400 MHz
    • 256KB SRAM with SECDED ECC

Industrial subsystem:

  • 2× gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Supports Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and more
    • Backward compatibility with 10/100Mb PRU_ICSS
    • Each PRU_ICSSG contains:
      • 2× Ethernet ports
        • MII (10/100)
        • RGMII (10/100/1000)
      • 6 PRU RISC cores per PRU_ICSSG each core having:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • Two 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta filters
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • One Enhanced Capture Module (ECAP)
      • 16550-compatible UART with a dedicated 192-MHz clock to support 12-Mbps PROFIBUS

Memory subsystem:

  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-Bit parallel bus with 133 MHz clock or
    • 32-Bit parallel bus with 100 MHz clock
    • Error Location Module (ELM) support

System on Chip (SoC) Services:

  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
  • Data Movement Subsystem (DMSS)

    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
    • Supports cryptographic cores
      • AES – 128/192/256 Bits key sizes
      • 3DES – 56/112/168 Bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • DRBG with true random number generator
      • PKA (Public Key Accelerator) to Assist in RSA/ECC processing
    • DMA support
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
  • Secure storage support
  • On-the-Fly encryption and authentication support for OSPI interface in XIP mode
  • Networking security support for data (Payload) encryption/authentication via packet based hardware cryptographic engine
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security

High-speed interfaces:

  • 1× Integrated Ethernet switch (CPSW3G) supporting
    • Up to 2 Ethernet ports
      • RMII (10/100)
      • RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 operation
    • Supports Single Lane operation
  • 1× USB 3.1-Gen1 Dual-Role Device (DRD) Subsystem (USBSS)
    • One enhanced SuperSpeed Gen1 port
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device
    • Integrated USB VBUS detection

General connectivity:

  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× configurable Universal Asynchronous Recieve/Transmit (UART) modules
  • 1× Flash Subsystem (FSS) that can be configured as Octal SPI (OSPI) flash interfaces or one Quad SPI (QSPI)
  • 1× 12-Bit Analog-to-Digital Converters (ADC)
    • Up to 4 MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (MCSPI) controllers
  • 6× Fast Serial Interface Receiver (FSI_RX) cores
  • 2× Fast Serial Interface Transmitter (FSI_TX) cores
  • 3× General-Purpose I/O (GPIO) modules

Control interfaces:

  • 9x Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with or without full CAN-FD support

Media and data storage:

  • 2× Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • One 4-bit for SD/SDIO;
    • One 8-bit for eMMC
    • Integrated analog switch for voltage switching between 3.3V to 1.8V for high-speed cards

Power management:

  • Simplified power sequence
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for safety monitoring of over-under voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional Safety:

  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2 targeted for MCU domain
    • Quality-Managed Main Domain
    • Safety-related certification
      • IEC 61508 certification planned
    • ECC or parity on calculation-critical memories
    • ECC and parity on select internal bus interconnect
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with error pin
    • Runtime safety diagnostics, voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engine for memory integrity checks
    • Dedicated MCU domain memory, interfaces, and M4F core capable of being isolated from the larger SoC with Freedom From Interference (FFI) features
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Dedicated PLL
      • Dedicated I/O supply
      • Separate reset

SoC architecture:

  • Supports primary boot from UART, I2C, OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, SD, eMMC, USB 2.0, PCIe, and Ethernet interfaces
  • 16-nm FinFET technology
  • 17.2 mm × 17.2 mm, 0.8-mm pitch, 441-pin BGA package

Processor cores:

  • 1× Dual 64-bit Arm Cortex-A53 microprocessor subsystem at up to 1.0 GHz
    • Dual-core Cortex-A53 cluster with 256KB L2 shared cache with SECDED ECC
    • Each A53 Core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection
  • Up to 2× Dual-core Arm Cortex-R5F MCU subsystems at at up to 800 MHz, integrated for real-time processing
    • Dual-core Arm Cortex-R5F supports dual-core and single-core modes
    • 32KB ICache, 32KB DCache and 64KB TCM per each R5F core for a total of 256KB TCM with SECDED ECC on all memories
  • 1× Single-core Arm Cortex-M4F MCU at up to 400 MHz
    • 256KB SRAM with SECDED ECC

Industrial subsystem:

  • 2× gigabit Industrial Communication Subsystems (PRU_ICSSG)
    • Supports Profinet IRT, Profinet RT, EtherNet/IP, EtherCAT, Time-Sensitive Networking (TSN), and more
    • Backward compatibility with 10/100Mb PRU_ICSS
    • Each PRU_ICSSG contains:
      • 2× Ethernet ports
        • MII (10/100)
        • RGMII (10/100/1000)
      • 6 PRU RISC cores per PRU_ICSSG each core having:
        • Instruction RAM with ECC
        • Broadside RAM
        • Multiplier with optional accumulator (MAC)
        • CRC16/32 hardware accelerator
        • Byte swap for Big/Little Endian conversion
        • SUM32 hardware accelerator for UDP checksum
        • Task Manager for preemption support
      • Three Data RAMs with ECC
      • 8 banks of 30 × 32-bit register scratchpad memory
      • Interrupt controller and task manager
      • Two 64-bit Industrial Ethernet Peripherals (IEPs) for time stamping and other time synchronization functions
      • 18× Sigma-Delta filters
        • Short circuit logic
        • Over-current logic
      • 6× Multi-protocol position encoder interfaces
      • One Enhanced Capture Module (ECAP)
      • 16550-compatible UART with a dedicated 192-MHz clock to support 12-Mbps PROFIBUS

Memory subsystem:

  • Up to 2MB of On-chip RAM (OCSRAM) with SECDED ECC:
    • Can be divided into smaller banks in increments of 256KB for as many as 8 separate memory banks
    • Each memory bank can be allocated to a single core to facilitate software task partitioning
  • DDR Subsystem (DDRSS)
    • Supports LPDDR4, DDR4 memory types
    • 16-Bit data bus with inline ECC
    • Supports speeds up to 1600 MT/s
  • 1× General-Purpose Memory Controller (GPMC)
    • 16-Bit parallel bus with 133 MHz clock or
    • 32-Bit parallel bus with 100 MHz clock
    • Error Location Module (ELM) support

System on Chip (SoC) Services:

  • Device Management Security Controller (DMSC-L)
    • Centralized SoC system controller
    • Manages system services including initial boot, security, and clock/reset/power management
    • Communication with various processing units over message manager
    • Simplified interface for optimizing unused peripherals
  • Data Movement Subsystem (DMSS)

    • Block Copy DMA (BCDMA)
    • Packet DMA (PKTDMA)
    • Secure Proxy (SEC_PROXY)
    • Ring Accelerator (RINGACC)

Security:

  • Secure boot supported
    • Hardware-enforced Root-of-Trust (RoT)
    • Support to switch RoT via backup key
    • Support for takeover protection, IP protection, and anti-roll back protection
  • Cryptographic acceleration supported
    • Session-aware cryptographic engine with ability to auto-switch key-material based on incoming data stream
    • Supports cryptographic cores
      • AES – 128/192/256 Bits key sizes
      • 3DES – 56/112/168 Bits key sizes
      • MD5, SHA1
      • SHA2 – 224/256/384/512
      • DRBG with true random number generator
      • PKA (Public Key Accelerator) to Assist in RSA/ECC processing
    • DMA support
  • Debugging security
    • Secure software controlled debug access
    • Security aware debugging
  • Trusted Execution Environment (TEE) supported
    • Arm TrustZone based TEE
    • Extensive firewall support for isolation
    • Secure watchdog/timer/IPC
  • Secure storage support
  • On-the-Fly encryption and authentication support for OSPI interface in XIP mode
  • Networking security support for data (Payload) encryption/authentication via packet based hardware cryptographic engine
  • Security co-processor (DMSC-L) for key and security management, with dedicated device level interconnect for security

High-speed interfaces:

  • 1× Integrated Ethernet switch (CPSW3G) supporting
    • Up to 2 Ethernet ports
      • RMII (10/100)
      • RGMII (10/100/1000)
    • IEEE 1588 (2008 Annex D, Annex E, Annex F) with 802.1AS PTP
    • Clause 45 MDIO PHY management
    • Energy efficient Ethernet (802.3az)
  • 1× PCI-Express Gen2 controller (PCIE)
    • Supports Gen2 operation
    • Supports Single Lane operation
  • 1× USB 3.1-Gen1 Dual-Role Device (DRD) Subsystem (USBSS)
    • One enhanced SuperSpeed Gen1 port
    • Port configurable as USB host, USB peripheral, or USB Dual-Role Device
    • Integrated USB VBUS detection

General connectivity:

  • 6× Inter-Integrated Circuit (I2C) ports
  • 9× configurable Universal Asynchronous Recieve/Transmit (UART) modules
  • 1× Flash Subsystem (FSS) that can be configured as Octal SPI (OSPI) flash interfaces or one Quad SPI (QSPI)
  • 1× 12-Bit Analog-to-Digital Converters (ADC)
    • Up to 4 MSPS
    • 8× multiplexed analog inputs
  • 7× Multichannel Serial Peripheral Interfaces (MCSPI) controllers
  • 6× Fast Serial Interface Receiver (FSI_RX) cores
  • 2× Fast Serial Interface Transmitter (FSI_TX) cores
  • 3× General-Purpose I/O (GPIO) modules

Control interfaces:

  • 9x Enhanced Pulse-Width Modulator (EPWM) modules
  • 3× Enhanced Capture (ECAP) modules
  • 3× Enhanced Quadrature Encoder Pulse (EQEP) modules
  • 2× Modular Controller Area Network (MCAN) modules with or without full CAN-FD support

Media and data storage:

  • 2× Multi-Media Card/Secure Digital (MMC/SD/SDIO) interfaces
    • One 4-bit for SD/SDIO;
    • One 8-bit for eMMC
    • Integrated analog switch for voltage switching between 3.3V to 1.8V for high-speed cards

Power management:

  • Simplified power sequence
  • Integrated SDIO LDO for handling automatic voltage transition for SD interface
  • Integrated voltage supervisor for safety monitoring of over-under voltage conditions
  • Integrated power supply glitch detector for detecting fast supply transients

Functional Safety:

  • Functional Safety-Compliant targeted
    • Developed for functional safety applications
    • Documentation will be available to aid IEC 61508 functional safety system design
    • Systematic capability up to SIL 3
    • Hardware integrity up to SIL 2 targeted for MCU domain
    • Quality-Managed Main Domain
    • Safety-related certification
      • IEC 61508 certification planned
    • ECC or parity on calculation-critical memories
    • ECC and parity on select internal bus interconnect
    • Built-In Self-Test (BIST) for CPU and on-chip RAM
    • Error Signaling Module (ESM) with error pin
    • Runtime safety diagnostics, voltage, temperature, and clock monitoring, windowed watchdog timers, CRC engine for memory integrity checks
    • Dedicated MCU domain memory, interfaces, and M4F core capable of being isolated from the larger SoC with Freedom From Interference (FFI) features
      • Separate interconnect
      • Firewalls and timeout gaskets
      • Dedicated PLL
      • Dedicated I/O supply
      • Separate reset

SoC architecture:

  • Supports primary boot from UART, I2C, OSPI/QSPI Flash, SPI Flash, parallel NOR Flash, parallel NAND Flash, SD, eMMC, USB 2.0, PCIe, and Ethernet interfaces
  • 16-nm FinFET technology
  • 17.2 mm × 17.2 mm, 0.8-mm pitch, 441-pin BGA package

AM64x is an extension of Sitara’s industrial-grade family of heterogeneous Arm processors. AM64x is built for industrial applications, such as motor drives and Programmable Logic Controllers (PLCs), which require a unique combination of real-time processing and communications with applications processing. AM64x combines two instances of Sitara’s gigabit TSN-enabled PRU-ICSSG with up to two Arm Cortex-A53 cores, up to four Cortex-R5F MCUs, and a Cortex-M4F MCU.

AM64x is architected to provide real-time performance through the high-performance R5Fs, Tightly-Coupled Memory banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM64x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, PWMs, sigma delta decimation filters, and absolute encoder interfaces help enable a number of different architectures found in these systems.

The Cortex-A53s provide the powerful computing elements necessary for Linux applications. Linux, and Real-time (RT) Linux, is provided through TI’s Processor SDK Linux which stays updated to the latest Long Term Support (LTS) Linux kernel, bootloader and Yocto file system on an annual basis. AM64x helps bridge the Linux world with the real-time world by enabling isolation between Linux applications and real-time streams through configurable memory partitioning. The Cortex-A53s can be assigned to work strictly out of DDR for Linux, and the internal SRAM can be broken up into various sizes for the Cortex-R5Fs to use together or independently.

The AM64x provides flexible industrial communications capability including full protocol stacks for EtherCAT slave, PROFINET device, EtherNet/IP adapter, and IO-Link Master. The PRU-ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU-ICSSG also enables additional interfaces in the SoC including sigma delta decimation filters and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with its dedicated peripherals which can all be isolated from the rest of the SoC. AM64x also supports secure boot.

AM64x is an extension of Sitara’s industrial-grade family of heterogeneous Arm processors. AM64x is built for industrial applications, such as motor drives and Programmable Logic Controllers (PLCs), which require a unique combination of real-time processing and communications with applications processing. AM64x combines two instances of Sitara’s gigabit TSN-enabled PRU-ICSSG with up to two Arm Cortex-A53 cores, up to four Cortex-R5F MCUs, and a Cortex-M4F MCU.

AM64x is architected to provide real-time performance through the high-performance R5Fs, Tightly-Coupled Memory banks, configurable SRAM partitioning, and dedicated low-latency paths to and from peripherals for rapid data movement in and out of the SoC. This deterministic architecture allows for AM64x to handle the tight control loops found in servo drives while the peripherals like FSI, GPMC, PWMs, sigma delta decimation filters, and absolute encoder interfaces help enable a number of different architectures found in these systems.

The Cortex-A53s provide the powerful computing elements necessary for Linux applications. Linux, and Real-time (RT) Linux, is provided through TI’s Processor SDK Linux which stays updated to the latest Long Term Support (LTS) Linux kernel, bootloader and Yocto file system on an annual basis. AM64x helps bridge the Linux world with the real-time world by enabling isolation between Linux applications and real-time streams through configurable memory partitioning. The Cortex-A53s can be assigned to work strictly out of DDR for Linux, and the internal SRAM can be broken up into various sizes for the Cortex-R5Fs to use together or independently.

The AM64x provides flexible industrial communications capability including full protocol stacks for EtherCAT slave, PROFINET device, EtherNet/IP adapter, and IO-Link Master. The PRU-ICSSG further provides capability for gigabit and TSN based protocols. In addition, the PRU-ICSSG also enables additional interfaces in the SoC including sigma delta decimation filters and absolute encoder interfaces.

Functional safety features can be enabled through the integrated Cortex-M4F along with its dedicated peripherals which can all be isolated from the rest of the SoC. AM64x also supports secure boot.

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Technical documentation

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Type Title Date
* Data sheet AM64x Sitara™ Processors datasheet (Rev. B) 06 Aug 2021
* Errata AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. C) 22 Dec 2021
Application note Industrial Communication Protocols Supported on Sitara™ Processors (Rev. D) 30 Sep 2021
User guide AM64x/AM243x Technical Reference Manual (Rev. C) 22 Sep 2021
Application note AM64x/AM243x Schematic Review Checklist (Rev. B) 20 Aug 2021
Application note Powering the AM64xx With the LP8733xx PMIC 15 Jul 2021
Application note AM64x/AM243x DDR Board Design and Layout Guidelines (Rev. A) 01 Jul 2021
Application note AM64x/AM243x Power Estimation Tool (Rev. A) 01 Jul 2021
User guide AM64x/AM243x BGA Escape Routing (Rev. A) 06 Apr 2021
More literature Decentralized servo architecture webinar 01 Mar 2021
Technical article Compact. Precise. Connected. Increase productivity with intelligent edge computing 01 Feb 2021
More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16 Dec 2020
Application note AM64x SerDes IBIS AMI README 02 Dec 2020
Application note AM64x Benchmarks 16 Nov 2020
Technical article Bringing the next evolution of machine learning to the edge 27 Nov 2018
Application note High-Speed Interface Layout Guidelines (Rev. H) 11 Oct 2018
Technical article How quality assurance on the Processor SDK can improve software scalability 22 Aug 2018
Technical article Clove: Low-Power video solutions based on Sitara™ AM57x processors 21 Jul 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

SK-AM64 — AM64x starter kit for the Sitara™ AM64x processor

The AM64x starter kit is a stand-alone test and development platform that is ideal for accelerating the prototype phase of your next design. The kit includes: wired and wireless connectivity, three expansion headers, multiple boot options and flexible debug capabilities.

The starter kit is equipped (...)

Out of stock on TI.com
Evaluation board

SLDRN-3P-SOMS — SolidRun system on modules for TI ARM-based processors and microcontrollers

SolidRun is a global leading developer of embedded systems and network solutions, focused on a wide range of energy-efficient, powerful and flexible products. SolidRun designs innovative, compact embedded solutions using TI Arm-based processors, offering a variety of platforms including system-on (...)

Evaluation board

TMDS64DC01EVM — AM64x IO-link and high-speed breakout card

The AM64x IO-Link and high speed expansion board is an add-on module for the AM64x GP EVM.  This board includes eight (8) IO-Link ports and general purpose signal breakout.  The Breakout board section provides the test access to all the IO signals included on the High Speed Expansion (...)

In stock
Limit: 2
Evaluation board

TMDS64GPEVM — AM64x GP EVM development platform for evaluating Sitara AM64x processor

The AM64x EVM is a standalone test, development, and evaluation module (EVM) that lets developers evaluate AM64x's functionality and develop prototypes for a variety of applications.

The EVM is equipped with a Sitara™ AM6442 processor along with additional components to allow the user to make (...)

In stock
Limit: 2
Evaluation board

TQ-3P-SITARASOMS — TQ Group system on modules for TI Arm-based processors and microcontrollers

TQ offers the complete range of services from development, through production and service right up to product life cycle management. The services cover assemblies, equipment and systems including hardware, software and mechanics. Customers can obtain all services from TQ on a modular basis as (...)
From: TQ-Group
Development kit

PHYTC-3P-SOMS — PHYTEC system on modules for TI ARM-based Processors and Microcontrollers

PHYTEC is an industry-leading provider and integrator of System on Modules (SOMs), embedded middleware and design services that enable customers to bring complex products quickly and easily to market. They guide customers from design to production utilizing deep domain expertise; high-quality (...)

From: PHYTEC
Software development kit (SDK)

PROCESSOR-SDK-AM64X — Software Development Kit for AM64x Sitara™ processors

The Processor and MCU+ SDKs (Software Development Kits) are unified software platforms for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos. All releases of these SDKs are consistent across TI’s broad portfolio for which they are provided, (...)
Application software & framework

FNDRS-3P-LINUX — Secure, customizable, Linux platform for building scalable IoT and Edge devices

Foundries.io provides a secure, customizable, Linux platform for building scalable IoT and Edge devices.

FoundriesFactory is a cloud service, enabling product developers to develop, deploy and maintain Linux software, applications and services for IoT and Edge devices and fleets, over product (...)

Code example or demo

ASTC-3P-VLAB-EVM-SIM — ASTC VLAB virtual development platforms and tools

VLAB Works is the industry leader in software technology for modeling, simulation, and virtual prototyping of embedded electronic systems. VLAB technologies and solutions enable the application of automation and agile processes to embedded systems development. VLAB Works helps customers design (...)
From: VLAB Works
IDE, configuration, compiler or debugger

SYSCONFIG — System configuration tool

To help simplify configuration challenges and accelerate software development, we created SysConfig, an intuitive and comprehensive collection of graphical utilities for configuring pins, peripherals, radios, subsystems, and other components.  SysConfig helps you manage, expose and resolve (...)
Support software

AM64x Software Build Sheet

SPRCAJ4.ZIP (20 KB)
Simulation model

AM64x/AM243x IBIS Model (Rev. A)

SPRM730A.ZIP (2225 KB) - IBIS Model
Simulation model

AM64x AMI Model

SPRM731.ZIP (44474 KB) - IBIS-AMI Model
Simulation model

AM64x/AM243x BSDL Model

SPRM732.ZIP (21 KB) - BSDL Model
Simulation model

AM64x/AM243x Thermal Model

SPRM773.ZIP (2 KB) - Thermal Model
Simulation model

AM64x Power Estimation Tool

SPRM779.ZIP (96 KB) - Power Model
Design tool

PROCESSORS-3P-SEARCH — Arm-based MPU, arm-based MCU and DSP third-party search tool

TI has partnered with companies to offer a wide range of software, tools, and SOMs using TI processors to accelerate your path to production. Download this search tool to quickly browse our third-party solutions and find the right third-party to meet your needs. The software, tools and modules (...)
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