EtherNet/IP is a member of a family of network protocols that implements the Common Industrial Protocol (CIP) at its upper layers. EtherNet/IP is the name given to CIP when it is implemented over standard Ethernet as defined by IEEE 802.3. Figure 3-7 illustrates the three software components required for EtherNet/IP device implementations on TI Sitara devices: PRU-based Layer 2 firmware, an Arm-hosted EtherNet/IP device stack, and the industrial application.

The PRU-ICSS firmware architecture for EtherNet/IP integration on TI Sitara devices is shown in Figure 3-8. The PRU-ICSS handles core Ethernet switch functions, including MAC learning, storm prevention, and packet statistics. Each of the two PRU cores independently manages one physical port, handling a dedicated RX/TX pair. Inter-core coordination is achieved via specialized instructions and shared memory. The architecture supports low-latency store-and-forward switching with configurable parameters, and allows PRUs to interrupt the Arm core in real time for deterministic processing.