SGLS162J April   2003  – June 2025 TPS793-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Shutdown
      3. 6.3.3 Foldback Current Limit
      4. 6.3.4 Thermal Protection
      5. 6.3.5 Reverse Current Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Exiting Dropout
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 External Capacitor Requirements
        2. 7.2.2.2 Adjustable Operation
          1. 7.2.2.2.1 Adjustable Operation (Legacy Chip)
          2. 7.2.2.2.2 Adjustable Operation (New Chip)
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
        2. 7.4.1.2 Power Dissipation and Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4 Pin Configuration and Functions

Figure 4-1 Fixed Option (Legacy Chip): DBV Package, 5-Pin SOT-23 (Top View)
TPS793-Q1 Fixed Option (New Chip): DBV Package, 5-Pin SOT-23 (Top View)Figure 4-3 Fixed Option (New Chip): DBV Package, 5-Pin SOT-23 (Top View)
TPS793-Q1 Adjustable Option (Legacy Chip): DBV Package, 6-Pin SOT-23 (Top View)Figure 4-2 Adjustable Option (Legacy Chip): DBV Package, 6-Pin SOT-23 (Top View)
Figure 4-4 Adjustable Option (New Chip): DBV Package, 6-Pin SOT-23 (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME ADJ (Legacy) FIXED (Legacy) ADJ (New) FIXED (New)
BYPASS 4 4 — — — Legacy chip: An external bypass capacitor, connected to this pin and in conjunction with an internal resistor, creates a low-pass filter to further reduce regulator noise.
EN 3 3 3 3 I Enable input that enables or shuts down the device. When EN goes to a logic high, the device is enabled. When the device goes to a logic low, the device is in shutdown mode.
FB 5 — 5 — I Feedback input voltage for the adjustable device
GND 2 2 2 2 — Regulator ground
IN 1 1 1 1 I Input to the device
NC — — 4 4 — New chip: No connect pin. This pin is not internally connected. Connect to ground for best thermal performance or leave floating.
OUT 6 5 6 5 O Regulated output of the device