SGLS162J April   2003  – June 2025 TPS793-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Shutdown
      3. 6.3.3 Foldback Current Limit
      4. 6.3.4 Thermal Protection
      5. 6.3.5 Reverse Current Operation
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Exiting Dropout
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 External Capacitor Requirements
        2. 7.2.2.2 Adjustable Operation
          1. 7.2.2.2.1 Adjustable Operation (Legacy Chip)
          2. 7.2.2.2.2 Adjustable Operation (New Chip)
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
        2. 7.4.1.2 Power Dissipation and Junction Temperature
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Modules
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
7.2.2.2.1 Adjustable Operation (Legacy Chip)

Choose resistors R1 and R2 for approximately a 50μA divider current. Using lower-value resistors improves noise performance, but the solution consumes more power. Avoid higher resistor values because leakage current from FB across R1 and R2 creates an offset voltage that artificially increases or decreases the feedback voltage. Thus, causing output voltage (VO) to erroneously decrease or increase. The recommended design procedure is to choose R2 = 30.1kΩ to set the divider current at 50μA. Set C1 = 15pF for stability, then calculate R1 with the following equation.

Equation 2. TPS793-Q1

To improve the stability of the adjustable version, place a small compensation capacitor between the OUT and FB (feed-forward capacitor) pins. For voltages <1.8V, make sure the value of this capacitor is 100pF. For voltages >1.8V, the following equation calculates the approximate value of this capacitor.

Equation 3. TPS793-Q1

Table 7-2 lists the suggested value of this capacitor for several resistor ratios. If this capacitor is not used (such as in a unity-gain configuration) or if an output voltage <1.8V is chosen, use a larger output capacitor. The minimum recommended output capacitor in this case is 4.7μF instead of 2.2μF.

Table 7-2 Output Voltage Programming Guide
OUTPUT VOLTAGE R1 R2 C1
2.5V 31.6kΩ 30.1kΩ 22pF
3.3V 51kΩ 30.1kΩ 15pF
3.6V 59kΩ 30.1kΩ 15pF