SGLS247C
September 2011 – December 2025
TPS763-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Output Enable
6.3.2
Dropout Voltage
6.3.3
Current Limit
6.3.4
Output Pulldown
6.3.5
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Device Functional Mode Comparison
6.4.2
Normal Operation
6.4.3
Dropout Operation
6.4.4
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Adjustable Device Feedback Resistors
7.1.2
Recommended Capacitor Types
7.1.2.1
Recommended Capacitors (Legacy Chip)
7.1.2.2
Recommended Capacitors (New Chip)
7.1.3
Input and Output Capacitor Requirements
7.1.3.1
Input Capacitor Requirements
7.1.3.2
Output Capacitor Requirements
7.1.4
Reverse Current
7.1.5
Feed-Forward Capacitor (CFF)
7.1.6
Power Dissipation (PD)
7.1.7
Estimating Junction Temperature
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Output Voltage Programming
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
7.4.3
Power Dissipation and Junction Temperature
8
Device and Documentation Support
8.1
Device Support
8.1.1
Third-Party Products Disclaimer
8.2
Documentation Support
8.2.1
Device Nomenclature
8.2.2
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Support Resources
8.5
Trademarks
8.6
Electrostatic Discharge Caution
8.7
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
5.6
Typical Characteristics
Figure 5-1
TPS76325-Q1 Output Voltage vs Output Current (Legacy Chip)
Figure 5-3
TPS76333-Q1 Output Voltage vs Output Current (new chip)
Figure 5-5
TPS76333-Q1 Output Voltage vs Output Current (new chip)
Figure 5-7
TPS76333-Q1 Short-circuit current vs Output voltage (new chip)
Figure 5-9
TPS76318-Q1 Output Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-11
TPS76350-Q1 Ground Current vs Free-Air Temperature (Legacy Chip)
Figure 5-13
Input Current vs Input Voltage (new chip)
Figure 5-15
Output Noise vs Frequency (Legacy Chip)
Figure 5-17
TPS76325-Q1 Dropout Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-19
TPS76333-Q1 Dropout Voltage vs Load Current (new chip)
Figure 5-21
TPS76318-Q1 Line Transient Response (Legacy Chip)
Figure 5-23
TPS76350-Q1 Line Transient Response (Legacy Chip)
V
OUT
= 3.3V, I
L
= 100mA
Figure 5-25
Line Transient Response (New Chip)
V
OUT
= 3.3V, C
OUT
= 2.2μF
Figure 5-27
Load Transient Response (New Chip)
Figure 5-29
Ripple Rejection versus Output Capacitor (C
L
) and Frequency (New Chip)
V
OUT
= 3.3V, R
L
= 3.3kΩ
Figure 5-31
Turn-on Waveform (New Chip)
V
IN
= 4.3V
Figure 5-33
Short Circuit Current versus Time (New Chip)
Figure 5-35
Typical Regions of Stability Compensation Series Resistance (CSR) vs Output Current (Legacy Chip)
Figure 5-37
Typical Regions of Stability Compensation Series Resistance (CSR) vs Output Current (Legacy Chip)
Figure 5-2
TPS76318-Q1 Output Voltage vs Output Current (Legacy Chip)
Figure 5-4
TPS76350-Q1 Output Voltage vs Output Current (Legacy Chip)
Figure 5-6
TPS76333-Q1 Output Voltage vs Input Voltage (new chip)
Figure 5-8
TPS76325-Q1 Output Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-10
TPS76350-Q1 Output Voltage vs Free-Air Temperature (Legacy Chip)
Figure 5-12
Ground Pin Current vs Load Current (new chip)
Figure 5-14
Ground-Pin Current vs Temperature (new chip)
Figure 5-16
Output Impedance vs Frequency (Legacy Chip)
Figure 5-18
TPS76333-Q1 Dropout Voltage vs Temperature (new chip)
Figure 5-20
TPS76325-Q1 Ripple Rejection vs Frequency (Legacy Chip)
Figure 5-22
TPS76318-Q1 Load Transient Response (Legacy Chip)
Figure 5-24
TPS76350-Q1 Load Transient Response (Legacy Chip)
V
OUT
= 3.3V, I
L
= 1mA
Figure 5-26
Line Transient Response (New Chip)
Figure 5-28
Ripple Rejection versus Load Current (I
L
) and Frequency (New Chip)
Figure 5-30
Output Noise Density versus Load Current (I
L
) Frequency (New Chip)
V
OUT
= 5V, R
L
= 5kΩ
Figure 5-32
Turn-off Waveform (New Chip)
V
IN
= 10.0V
Figure 5-34
Short Circuit Current versus Time (New Chip)
Figure 5-36
Typical Regions of Stability Compensation Series Resistance (CSR) vs Added Ceramic Capacitance (Legacy Chip)
Figure 5-38
Typical Regions of Stability Compensation Series Resistance (CSR) vs Added Ceramic (Legacy Chip)