SGLS303H May   2005  – July 2025 TPS732-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Thermal Information
    6. 5.6 Electrical Characteristics
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit
      2. 6.3.2 Shutdown
      3. 6.3.3 Dropout Voltage
      4. 6.3.4 Transient Response
      5. 6.3.5 Reverse Current
      6. 6.3.6 Thermal Protection
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input and Output Capacitor Requirements
        2. 7.2.2.2 Output Noise
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
        1. 7.4.1.1 Power Dissipation
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

5.6 Electrical Characteristics

Over operating temperature range (TJ = –40°C to 125°C), VIN = VOUT(nom) + 0.5V(1), IOUT = 10mA, VEN = 1.7V, and COUT = 0.1μF (unless otherwise noted). Typical values are at TJ = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VFB Internal reference   (TPS73201-Q1) TJ = 25°C  1.198 1.204 1.210 V
VOUT Output voltage range (TPS73201-Q1)(2) VFB 5.5 - VDO V
Accuracy(1) Nominal  TJ = 25°C –0.5 0.5 %
VIN, IOUT, and T  VOUT + 0.5V ≤ VIN ≤ 5.5V; 10mA ≤ IOUT ≤ 250mA  –1 ±0.5 1
ΔVOUT(ΔVIN) Line regulation (VOUT(nom) + 0.5V) ≤ VIN ≤ 5.5V 0.06 %/V
ΔVOUT(ΔIOUT) Load regulation 1mA ≤ IOUT ≤ 250mA 0.002 %/mA
ΔVOUT(ΔIOUT) Load regulation 10mA ≤ IOUT ≤ 250mA 0.0008 %/mA
VDO Dropout voltage(3) (VIN = VOUT(NOM) - 0.1V) IOUT = 250mA 40 150 mV
ZO(DO) Output impedance in dropout 1.7V ≤ VIN ≤ VOUT + VDO 0.25 Ω
ICL Output current limit VOUT = 0.9 × VOUT(nom)  250 425 600 mA
ISC Short-circuit current VOUT = 0V  300 mA
IREV Reverse leakage current(4) (-IIN) VEN ≤ 0.5V, 0V ≤ VIN ≤ VOUT  0.1 10 µA
IGND Ground pin current IOUT = 10mA (IQ), legacy silicon 400 550 µA
IOUT = 10mA (IQ), new silicon       400 630
IGND Ground pin current IOUT = 250mA 650 950 µA
ISHDN Shutdown current (IGND) VEN ≤ 0.5V, VOUT ≤ VIN ≤ 5.5V 0.02 1 µA
IFB Feedback pin current (TPS73201) 0.1 0.45 µA
PSRR Power-supply rejection ratio (ripple rejection) f = 100Hz, IOUT = 250mA  58 dB
f = 10kHz, IOUT = 250mA 37
VN Output noise voltage, BW = 10Hz to 100kHz COUT = 10µF, no CNR 27 × VOUT µVRMS
COUT = 10µF, CNR =0.01µF 8.5 × VOUT
VEN(high) EN pin high (enabled) 1.7 VIN V
VEN(low) EN pin low (shutdown) 0 0.5 V
IEN(high) Enable pin current (enabled) VEN = 5.5V   0.02 0.1 µA
TSD Thermal shutdown temperature Shutdown, temperature increasing 160 °C
Reset, temperature decreasing 140
(1) Minimum VIN = VOUT + VDO or 1.7V, whichever is greater.
(2) TPS73201-Q1 is tested at VOUT = 2.5V.
(3) VDO is not measured for output versions with VOUT(nom) < 1.8V, because minimum VIN = 1.7V.
(4) Fixed-voltage versions only; refer to Application Information section for more information.