SGLS367F September   2006  – March 2025 SN65HVD30-EP , SN65HVD33-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Dissipation Ratings
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Switching Characteristics: Driver
    9. 6.9  Switching Characteristics: Receiver
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Standby Mode
      2. 8.3.2 Driver Output Current Limiting
      3. 8.3.3 Hot-Plugging
      4. 8.3.4 Receiver Failsafe
      5. 8.3.5 Safe Operation With Bus Contention
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

3 Description

The SN65HVD3x-EP devices are 3-state differential line drivers and differential-input line receivers that operate with 3V power supply.

Each driver and receiver has separate input and output pins for full-duplex bus communication designs. They are designed for balanced transmission lines and interoperation with ANSI TIA/EIA-485A, TIA/EIA-422-B, ITU-T v.11, and ISO 8482:1993 standard-compliant devices.

The SN65HVD30 is fully enabled with no external enabling pins.

The SN65HVD33 has active-high driver enables and active-low receiver enables. A low (less than 1μA) standby current is achieved by disabling both the driver and receiver.

All devices are characterized for operation from –55°C to 125°C.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
SN65HVD3x-EPSOIC (8)4.9mm x 6mm
SOIC (14)8.65mm x 6mm
(1) For more information see Section 12.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.


SN65HVD30-EP SN65HVD33-EP Typical Application Schematic Typical Application Schematic