SGLS367F September   2006  – March 2025 SN65HVD30-EP , SN65HVD33-EP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Dissipation Ratings
    6. 6.6  Electrical Characteristics: Driver
    7. 6.7  Electrical Characteristics: Receiver
    8. 6.8  Switching Characteristics: Driver
    9. 6.9  Switching Characteristics: Receiver
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Low-Power Standby Mode
      2. 8.3.2 Driver Output Current Limiting
      3. 8.3.3 Hot-Plugging
      4. 8.3.4 Receiver Failsafe
      5. 8.3.5 Safe Operation With Bus Contention
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Data Rate and Bus Length
        2. 9.2.1.2 Stub Length
        3. 9.2.1.3 Bus Loading
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

8.4 Device Functional Modes

Table 8-1 through Table 8-4 list the functional modes of the devices.

Table 8-1 SN65HVD33 Driver
INPUTSOUTPUTS
DDEYZ
HHHL
LHLH
XL or openZZ
OpenHLH
Table 8-2 SN65HVD33 Receiver
DIFFERENTIAL INPUTS
VID = V(A) – V(B)		ENABLE
RE		OUTPUT
R
VID  ≤ –0.2 VLL
–0.2 V < VID < –0.02 VL—
–0.02 V ≤ VIDLH
XH or openZ
Open CircuitLH
Idle circuitLH
Short Circuit, V(A)  = V(B)LH
Table 8-3 SN65HVD30 Driver
INPUT
D		OUTPUTS
YZ
HHL
LLH
OpenLH
Table 8-4 SN65HVD30 Receiver
DIFFERENTIAL INPUTS
VID = V(A) – V(B)		OUTPUT
R
VID ≤ –0.2 VL
–0.02 V ≤ VIDH
Open CircuitH
Idle circuitH
Short Circuit, V(A) = V(B)H
SN65HVD30-EP SN65HVD33-EP Equivalent Input and Output Schematic DiagramsFigure 8-5 Equivalent Input and Output Schematic Diagrams
Table 8-5 Input Attenuator Resistance Values
PART NUMBERR1, R2R3
SN65HVD30, SN65HVD339kΩ45kΩ