SGLS385A March   2007  – June 2025 TLC372-EP

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Description
  4.   Ordering Information
  5. 3Specifications
    1. 3.1 Absolute Maximum Ratings
    2. 3.2 Recommended Operating Conditions
    3. 3.3 Electrical Characteristics
    4. 3.4 Switching Characteristics
    5. 3.5 Typical Characteristics
  6. 4Detailed Description
    1. 4.1 Overview
    2. 4.2 Functional Block Diagrams
    3. 4.3 Feature Description
    4. 4.4 Device Functional Modes
      1. 4.4.1 Input
      2. 4.4.2 ESD Protection
      3. 4.4.3 Unused Inputs
      4. 4.4.4 Open-Drain Output
      5. 4.4.5 Hysteresis
  7. 5Application and Implementation
    1. 5.1 Application Information
      1. 5.1.1 Basic Comparator Definitions
        1. 5.1.1.1 Operation
        2. 5.1.1.2 Propagation Delay
        3. 5.1.1.3 Overdrive and Underdrive Voltage
    2. 5.2 Typical Applications
      1. 5.2.1 Window Comparator
        1. 5.2.1.1 Design Requirements
        2. 5.2.1.2 Detailed Design Procedure
        3. 5.2.1.3 Application Curve
    3. 5.3 Power Supply Recommendations
    4. 5.4 Layout
      1. 5.4.1 Layout Guidelines
      2. 5.4.2 Layout Example
  8. 6Device and Documentation Support
    1. 6.1 Documentation Support
      1. 6.1.1 Related Documentation
    2. 6.2 Receiving Notification of Documentation Updates
    3. 6.3 Support Resources
    4. 6.4 Trademarks
    5. 6.5 Electrostatic Discharge Caution
    6. 6.6 Glossary
  9. 7Revision History
  10. 8Mechanical, Packaging, and Orderable Information

4.4.4 Open-Drain Output

The TLC372-EP features an open-drain (also commonly called open collector) sinking-only output stage enabling the output logic levels to be pulled up to an external voltage from 0V up to 16V, independent of the comparator supply voltage (VDD). The open-drain output allows logical OR'ing of multiple open drain outputs and logic level translation. TI recommends setting the pull-up resistor current to between 100uA and 1mA. Lower value pull-up resistor values can help increase the rising edge rise-time, but at the expense of increasing VOL and higher power dissipation. The rise-time is dependent on the time constant of the total pull-up resistance and total load capacitance. Large value pull-up resistors (>1 MΩ) creates an exponential rising edge due to the output RC time constant and increase the rise-time.

Directly shorting the output to VDD can result in thermal runaway and eventual device destruction at high (>12V) pull-up voltages. If output shorts are possible, a series current limiting resistor is recommended to limit the power dissipation.

Unused open drain outputs can be left floating, or can be tied to the GND pin if floating pins are not desired.