SLAA534A June   2013  – June 2020

 

  1. 1 Introduction
    1. 1.1  ABIs for the MSP430
    2. 1.2  Scope
    3. 1.3  ABI Variants
    4. 1.4  Toolchains and Interoperability
    5. 1.5  Libraries
    6. 1.6  Types of Object Files
    7. 1.7  Segments
    8. 1.8  MSP430 Architecture Overview
    9. 1.9  MSP430 Memory Models
    10. 1.10 Reference Documents
    11. 1.11 Code Fragment Notation
  2. 2 Data Representation
    1. 2.1 Basic Types
    2. 2.2 Data in Registers
    3. 2.3 Data in Memory
    4. 2.4 Pointer Types
    5. 2.5 Complex Types
    6. 2.6 Structures and Unions
    7. 2.7 Arrays
    8. 2.8 Bit Fields
      1. 2.8.1 Volatile Bit Fields
    9. 2.9 Enumeration Types
  3. 3 Calling Conventions
    1. 3.1 Call and Return
      1. 3.1.1 Call Instructions
        1. 3.1.1.1 Indirect Calls
        2. 3.1.1.2 Direct Calls
      2. 3.1.2 Return Instruction
      3. 3.1.3 Pipeline Conventions
      4. 3.1.4 Weak Functions
    2. 3.2 Register Conventions
      1. 3.2.1 Argument Registers
      2. 3.2.2 Callee-Saved Registers
    3. 3.3 Argument Passing
      1. 3.3.1 Register Singles
      2. 3.3.2 Register Pairs
      3. 3.3.3 Split Pairs
      4. 3.3.4 Quads (Four-Register Arguments)
      5. 3.3.5 Special Convention for Compiler Helper Functions
      6. 3.3.6 C++ Argument Passing
      7. 3.3.7 Passing Structs and Unions
      8. 3.3.8 Stack Layout of Arguments Not Passed in Registers
      9. 3.3.9 Frame Pointer
    4. 3.4 Return Values
    5. 3.5 Structures and Unions Passed and Returned by Reference
    6. 3.6 Conventions for Compiler Helper Functions
    7. 3.7 Scratch Registers for Functions Already Seen
    8. 3.8 _ _mspabi_func_epilog Helper Functions
    9. 3.9 Interrupt Functions
  4. 4 Data Allocation and Addressing
    1. 4.1 Data Sections and Segments
    2. 4.2 Addressing Modes
    3. 4.3 Allocation and Addressing of Static Data
      1. 4.3.1 Addressing Methods for Static Data
        1. 4.3.1.1 Absolute Addressing
        2. 4.3.1.2 Symbolic Addressing
        3. 4.3.1.3 Immediate Addressing
      2. 4.3.2 Placement Conventions for Static Data
        1. 4.3.2.1 Abstract Conventions for Placement
        2. 4.3.2.2 Abstract Conventions for Addressing
      3. 4.3.3 Initialization of Static Data
    4. 4.4 Automatic Variables
    5. 4.5 Frame Layout
      1. 4.5.1 Stack Alignment
      2. 4.5.2 Register Save Order
    6. 4.6 Heap-Allocated Objects
  5. 5 Code Allocation and Addressing
    1. 5.1 Computing the Address of a Code Label
      1. 5.1.1 Absolute Addressing for Code
      2. 5.1.2 Symbolic Addressing
      3. 5.1.3 Immediate Addressing
    2. 5.2 Branching
    3. 5.3 Calls
      1. 5.3.1 Direct Call
      2. 5.3.2 Far Call Trampoline
      3. 5.3.3 Indirect Calls
  6. 6 Helper Function API
    1. 6.1 Floating-Point Behavior
    2. 6.2 C Helper Function API
    3. 6.3 Special Register Conventions for Helper Functions
    4. 6.4 Floating-Point Helper Functions for C99
  7. 7 Standard C Library API
    1. 7.1  Reserved Symbols
    2. 7.2  <assert.h> Implementation
    3. 7.3  <complex.h> Implementation
    4. 7.4  <ctype.h> Implementation
    5. 7.5  <errno.h> Implementation
    6. 7.6  <float.h> Implementation
    7. 7.7  <inttypes.h> Implementation
    8. 7.8  <iso646.h> Implementation
    9. 7.9  <limits.h> Implementation
    10. 7.10 <locale.h> Implementation
    11. 7.11 <math.h> Implementation
    12. 7.12 <setjmp.h> Implementation
    13. 7.13 <signal.h> Implementation
    14. 7.14 <stdarg.h> Implementation
    15. 7.15 <stdbool.h> Implementation
    16. 7.16 <stddef.h> Implementation
    17. 7.17 <stdint.h> Implementation
    18. 7.18 <stdio.h> Implementation
    19. 7.19 <stdlib.h> Implementation
    20. 7.20 <string.h> Implementation
    21. 7.21 <tgmath.h> Implementation
    22. 7.22 <time.h> Implementation
    23. 7.23 <wchar.h> Implementation
    24. 7.24 <wctype.h> Implementation
  8. 8 C++ ABI
    1. 8.1  Limits (GC++ABI 1.2)
    2. 8.2  Export Template (GC++ABI 1.4.2)
    3. 8.3  Data Layout (GC++ABI Chapter 2)
    4. 8.4  Initialization Guard Variables (GC++ABI 2.8)
    5. 8.5  Constructor Return Value (GC++ABI 3.1.5)
    6. 8.6  One-Time Construction API (GC++ABI 3.3.2)
    7. 8.7  Controlling Object Construction Order (GC++ ABI 3.3.4)
    8. 8.8  Demangler API (GC++ABI 3.4)
    9. 8.9  Static Data (GC++ ABI 5.2.2)
    10. 8.10 Virtual Tables and the Key function (GC++ABI 5.2.3)
    11. 8.11 Unwind Table Location (GC++ABI 5.3)
  9. 9 Exception Handling
    1. 9.1  Overview
    2. 9.2  PREL31 Encoding
    3. 9.3  The Exception Index Table (EXIDX)
      1. 9.3.1 Pointer to Out-of-Line EXTAB Entry
      2. 9.3.2 EXIDX_CANTUNWIND
      3. 9.3.3 Inlined EXTAB Entry
    4. 9.4  The Exception Handling Instruction Table (EXTAB)
      1. 9.4.1 EXTAB Generic Model
      2. 9.4.2 EXTAB Compact Model
      3. 9.4.3 Personality Routines
    5. 9.5  Unwinding Instructions
      1. 9.5.1 Common Sequence
      2. 9.5.2 Byte-Encoded Unwinding Instructions
    6. 9.6  Descriptors
      1. 9.6.1 Encoding of Type Identifiers
      2. 9.6.2 Scope
      3. 9.6.3 Cleanup Descriptor
      4. 9.6.4 Catch Descriptor
      5. 9.6.5 Function Exception Specification (FESPEC) Descriptor
    7. 9.7  Special Sections
    8. 9.8  Interaction With Non-C++ Code
      1. 9.8.1 Automatic EXIDX Entry Generation
      2. 9.8.2 Hand-Coded Assembly Functions
    9. 9.9  Interaction With System Features
      1. 9.9.1 Shared Libraries
      2. 9.9.2 Overlays
      3. 9.9.3 Interrupts
    10. 9.10 Assembly Language Operators in the TI Toolchain
  10. 10DWARF
    1. 10.1 DWARF Register Names
    2. 10.2 Call Frame Information
    3. 10.3 Vendor Names
    4. 10.4 Vendor Extensions
  11. 11ELF Object Files (Processor Supplement)
    1. 11.1 Registered Vendor Names
    2. 11.2 ELF Header
    3. 11.3 Sections
      1. 11.3.1 Section Indexes
      2. 11.3.2 Section Types
      3. 11.3.3 Extended Section Header Attributes
      4. 11.3.4 Subsections
      5. 11.3.5 Special Sections
      6. 11.3.6 Section Alignment
    4. 11.4 Symbol Table
      1. 11.4.1 Symbol Types
      2. 11.4.2 Common Block Symbols
      3. 11.4.3 Symbol Names
      4. 11.4.4 Reserved Symbol Names
      5. 11.4.5 Mapping Symbols
    5. 11.5 Relocation
      1. 11.5.1 Relocation Types
        1. 11.5.1.1 Absolute Relocations
        2. 11.5.1.2 PC-Relative Relocations
        3. 11.5.1.3 Relocations in Data Sections
        4. 11.5.1.4 Relocations for MSP430 Instructions
        5. 11.5.1.5 Relocations for MSP430X Instructions
        6. 11.5.1.6 Other Relocation Types
      2. 11.5.2 Relocation Operations
      3. 11.5.3 Relocation of Unresolved Weak References
  12. 12ELF Program Loading and Linking (Processor Supplement)
    1. 12.1 Program Header
      1. 12.1.1 Base Address
      2. 12.1.2 Segment Contents
      3. 12.1.3 Thread-Local Storage
    2. 12.2 Program Loading
  13. 13Build Attributes
    1. 13.1 MSP430 ABI Build Attribute Subsection
    2. 13.2 MSP430 Build Attribute Tags
  14. 14Copy Tables and Variable Initialization
    1. 14.1 Copy Table Format
    2. 14.2 Compressed Data Formats
      1. 14.2.1 RLE
      2. 14.2.2 LZSS Format
    3. 14.3 Variable Initialization
  15. 15Revision History

9.5.2 Byte-Encoded Unwinding Instructions

Personality routines PR0, PR1, and PR2 use a byte-encoded sequence of instructions to describe how to unwind the frame. The first few instructions are packed into the three remaining bytes of the first word of the EXTAB; additional instructions are packed into subsequent words. Unused bytes in the last word are filled with “RET ” instructions.

Although the instructions are byte-encoded, they are always packed into 32-bit words starting at the MSB. As a consequence, the first unwinding instruction will not be at the lowest-addressed byte in little-endian mode.

Personality routine PR0 allows at most three unwinding instructions, all of which are stored in the first EXTAB word. If there are more than three unwinding instructions, one of the other personality routines must be used.

GUID-59BA2E98-7DFC-4DAA-A556-3B41DB5F1AFB-low.gif

For PR1 and PR2, bits 23-16 encode the number of extra 32-bit words of unwinding instructions, which can be 0.

GUID-96D09DE5-7B2B-4CAD-8571-4D28DE64F66B-low.gif

Table 9-2 summarizes the unwinding instruction set. Each instruction is described in more detail after the table.

Table 9-2 Stack Unwinding Instructions
EncodingInstructionDescription
0xxx xxxxPOP bitmask (R10, R9, R8, R7, R6, R5, R4) + RETRestore callee-saved registers and return.
11kk kkkkSP += (kkkkkk << 1) + 2 [0x02-0x80]Increment by small constant
1000 0001 kkkk ....SP += (ULEB128 << 1) + 0x102 [0x102-max]Increment by large constant
1000 0000 0000 0000CANTUNWINDFunction cannot be unwound

All other bit patterns are reserved.

The following paragraphs detail the interpretation of the unwinding instructions.

POP + RET

The POP+RET instruction specifies a bitmask representing registers saved by this function's prolog. These registers must be popped in order, starting with R4 and proceeding through R10. When that is done, there are no more unwinding instructions. If none of the bits in the bitmask are set, this is simply a RET instruction.

 

Small Increment

GUID-567C2F29-289B-4797-A4B2-E4A0F660144A-low.png

The value of k is extracted from the lower 6 bits of the encoding. This instruction can increment the SP by a value in the range 0x8 to 0x200, inclusive. Increments in the range 0x208 to 0x400 should be done with two of these instructions.

 

Large Increment

GUID-7EECDDED-60B3-4F24-8D34-31300F88DB08-low.png

The value ULEB128 is ULEB128-encoded in the bytes following the 8-bit opcode. This instruction can increment the SP by a value of 0x408 or greater. Increments less than 0x408 should be done with one or two Small Increment instructions.

 

CANTUNWIND

GUID-1F86C2BF-298C-47BD-9849-A06121E58853-low.gif

This instruction indicates that the function cannot be unwound, usually because it is an interrupt function. However, an interrupt function can still have try/catch code, so EXIDX_CANTUNWIND is not appropriate.