SLAAE74A December   2022  – March 2023 MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G3105 , MSPM0G3106 , MSPM0G3107 , MSPM0G3505 , MSPM0G3506 , MSPM0G3507 , MSPM0L1105 , MSPM0L1106 , MSPM0L1303 , MSPM0L1304 , MSPM0L1305 , MSPM0L1306 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346

 

  1.   Abstract
  2.   Trademarks
  3. 1Software Porting Flow
  4. 2Development Environments
    1. 2.1 Integrated Development Environments (IDEs)
    2. 2.2 Software Ecosystems
      1. 2.2.1 MSP430 Software Support Package: MSP430Ware
        1. 2.2.1.1 Register-Level Example Code
        2. 2.2.1.2 Driver Library
        3. 2.2.1.3 Middleware
      2. 2.2.2 MSPM0 Software Support Package: MSPM0SDK
    3. 2.3 SysConfig for MSPM0 MCUs
      1. 2.3.1 Standalone SysConfig
      2. 2.3.2 CCS-Integrated SysConfig
      3. 2.3.3 Example of a SysConfig Project
    4. 2.4 MSP430 and MSPM0 Projects
    5. 2.5 Debugger Interfaces
      1. 2.5.1 MSP430 Debugger
        1. 2.5.1.1 MSPFET Connection Interface
      2. 2.5.2 MSPM0 Debugger
        1. 2.5.2.1 MSPM0 Debug Port Pins and Pinout
  5. 3Migration Considerations
    1. 3.1  Peripherals
    2. 3.2  System Clocks
      1. 3.2.1 Oscillators
        1. 3.2.1.1 MSPM0 Oscillators
      2. 3.2.2 Clock Signals
    3. 3.3  Operation Modes
    4. 3.4  Nonvolatile Memory (NVM)
      1. 3.4.1 MSPM0 Memory Protection Unit
      2. 3.4.2 MSP430 FRAM and MSPM0 Flash
      3. 3.4.3 MSP430 Flash and MSPM0 Flash
    5. 3.5  Event and Interrupt Handling
    6. 3.6  Reset Levels
    7. 3.7  GPIOs and Pin Multiplexing
    8. 3.8  Communication Interfaces
      1. 3.8.1 SPI
      2. 3.8.2 I2C
      3. 3.8.3 UART
      4. 3.8.4 CAN FD
    9. 3.9  BSL
    10. 3.10 Analog Peripherals
      1. 3.10.1 SAR ADC
        1. 3.10.1.1 Simultaneous Sampling
        2. 3.10.1.2 Window Comparator
      2. 3.10.2 COMP
        1. 3.10.2.1 Window Compare Mode
      3. 3.10.3 OPA
    11. 3.11 Timers
    12. 3.12 Hardware Design Guide
  6. 4Revision History

2.3.3 Example of a SysConfig Project

In the toggle output example project shown in #GUID-36995428-80D9-4006-A379-6717B352C160, the configuration file is included in the project. When the project is built, CCS generates the configuration header and code files based on the configuration file. In this project, the GPIOs and system clock are configured. For further development, open the SysConfig file in CCS and modify the peripherals as needed. The header and code files are updated when the project is built.

GUID-15252B67-9AF1-4955-8D63-19439DCF950B-low.pngFigure 2-5 SysConfig Project With CCS