SLAAEC5A September   2024  – August 2025

 

  1.   1
  2. Description
  3. Required Peripherals
  4. Design Steps
  5. Design Considerations
  6. Software Flow Chart
  7. Application Code
  8. Results
  9. Additional Resources
  10. Revision History
  11. 10E2E
  12. 11Trademarks

Description

The PWM DAC subsystem example demonstrates how to use an MSPM0 timer, and a simple RC filter to create a PWM DAC. The example software creates a 10-bit DAC with a PWM frequency of 31250Hz. The duty cycle of the PWM signal updates continuously to create a sinusoidal waveform at the filter output. While the MSPM0Gx50x devices include a 12-bit DAC, and the internal comparators include 8-bit reference DACs that can buffered through the OPA, a PWM DAC allows for the generation of analog output voltages on devices lacking these peripherals, or just for additional DAC outputs whenever needed. Figure 1-1 shows the block diagram for a single PWM DAC.

 Subsystem Functional Block DiagramFigure 1-1 Subsystem Functional Block Diagram