SLAAEL9A October   2024  – August 2025 MSPM0C1104 , MSPM0C1105 , MSPM0C1106 , MSPM0H3216 , MSPM0L1306

 

  1.   1
  2. 1Description
  3. 2Required Peripherals
  4. 3Hardware Setup
  5. 4Software Introduction
    1. 4.1 Code Introduction
    2. 4.2 Protocol Introduction
  6. 5Design Steps
  7. 6Results
  8. 7Revision History
  9. 8Trademarks

1 Description

Note: TI is transitioning to use more inclusive terminology. Some language contained in this document is possibly different than previously-used terms for certain technology areas.

This subsystem demonstrates how to use MSPM0 to achieve IO expander function through the communication command from serial peripheral interface (SPI), I2C, or universal asynchronous receiver-transmitter (UART) by the host. This expansion is helpful when the number of GPIOs on the host is inadequate. In addition to supporting control of the GPIO output, the subsystem can also read back the GPIO status through SPI, I2C, or UART. The figure below shows the basic architecture of the subsystem and the modules which are used in this case.

MSPM0 Subsystem Functional Block Diagram Figure 1-1 Subsystem Functional Block Diagram

Table 1-2 has links to the example code. In this demonstration, the IO control number is limited to eight. However, users can do further IO expansion by referring to this demonstration.