SLAAEL9A October 2024 – August 2025 MSPM0C1104 , MSPM0C1105 , MSPM0C1106 , MSPM0H3216 , MSPM0L1306
The following hardware elements are required to evaluate the IO expander based on MSPM0:
In this subsystem, the customer can flexibly choose different communication interfaces, including I2C, SPI, or UART. This can greatly increase the flexibility of the customer system design. Figure 3-1 shows the hardware connection in this design, using LP-MSPM0C1104 as an example.
Table 3-1 shows the pin configuration, you can also change the configuration following your requirements. The SPI communication is configured as three-wire mode to save GPIO resources. The pin configuration is the same for MSPM0L1306 and MSPM0C1104.
| Module | Function | Pin Configuration | Comment |
|---|---|---|---|
| I2C interface | SDA | PA0 | Address: 0x48, I2C clock freq: 400kHz |
| SDL | PA1 | ||
| Serial Peripheral Interface | POSI | PA25 | SPI clock freq: 500kHz |
| PISO | PA26 | ||
| CLOCK | PA17 | ||
| UART interface | RX | PA18 | Baud rate: 9600bps |
| TX | PA23 | ||
| GPIO | GPIO | BIT0:PA2, BIT1:PA27, BIT2:PA17, BIT3:PA24, BIT4:PA4, BIT5:PA6, BIT6:PA16, BIT7:PA22 |