1 Power Architecture of a Class-D Digital Audio Amplifier and Its Loss Breakdown

To improve the efficiency of a Class-D digital audio amplifier, it is first necessary to understand its power architecture and power loss breakdown. Taking the TAS58xx as an example, a TAS58xx audio amplifier normally requires only two power supplies: DVDD and PVDD.

Figure 1-1 TAS58xx Power Architecture

DVDD is generally 1.8V or 3.3V, typically draws around 22mA, and supplies the internal digital circuitry of the digital input audio amplifier, such as the digital IO, and also provides power to digital circuits like the DSP core after being converted to VR_DIG (1.5V) by an LDO. Common analog input Class-D audio amplifiers, such as the TPA3128D2, do not have digital circuitry and therefore do not have the DVDD supply. The most significant loss of the DVDD supply comes from the low efficiency of the LDO step-down and the power consumption of the DSP during operation. The amount of DSP power dissipation is closely related to the DSP architecture, semiconductor process, operating modes such as operating frequency, signal sampling rate, DSP processing flow, and so forth. To optimize this power dissipation, these aspects can be considered. This article focuses solely on an in-depth study of PVDD power optimization.

The PVDD supply ranges from 4.5V to 26.4V, and its quiescent current consumption typically ranges from 20mA to 100mA, depending on the voltage and operating mode. It supplies the audio amplifier's power output stage, as well as the analog circuitry (AVDD) and drive circuitry (GVDD) after being stepped down by an LDO. PVDD losses mainly include conduction loss, switching loss, GVDD drive loss, AVDD analog circuitry loss, dead time loss, and LC filter circuitry loss.

Figure 1-2 Loss Breakdown of PVDD

Conduction loss is caused by the impedance Rds(on) of MOSFETs during conduction. During conduction, both the high-side and low-side MOSFETs are turned on. This impedance forms a voltage divider with the speaker (load), resulting in power dissipation and heat generation, as shown in Equation 1 below. Conduction loss increases when Rds(on) and PVDD voltage are higher. As the output power increases, the PVDD voltage becomes greater, and the conduction current also rises. Consequently, the loss caused by the conduction impedance becomes larger. Therefore, the conduction loss dominates at high-power output.

Equation 1.

P_{c o n d} = I^{2} \times R = {2 \times \{\frac{V_{p v d d}}{2 R_{d s (o n)} + R_{L}}\}}^{2} \times (2 R_{d s (o n)})

Switching loss is caused by the non-ideal states of MOSFETs during turn-on and turn-off transitions. Because it takes a certain period of time for MOSFETs to fully turn on or off, power is dissipated during this process. A full-bridge audio amplifier has four MOSFETs, and the switching loss is given by Equation 2. As the equation shows, the switching loss is proportional to the switching frequency, PVDD voltage, and output current.

Equation 2.

P_{s w} = 2 \times V_{p v d d} \times I_{o u t} \times (t_{s w o n} + t_{s w o f f}) \times f_{s w}

Drive loss is the power dissipated to drive MOSFETs on and off. It is related to the drive voltage, the MOSFET's Q_g parameter, and the switching frequency. The drive voltage is obtained from PVDD through an LDO step-down and a bootstrap circuit. The LDO efficiency is η = V_gvdd ÷ V_pvdd. The drive loss is given by Equation 3 below, which shows that the higher the PVDD voltage, the lower the LDO efficiency, and the greater the drive loss.

Equation 3.

P_{g d} = 4 \times Q_{g} \times V_{p v d d} \times η \times f_{s w}

Dead time loss occurs during the dead time. Because the turn-off and turn-on of the high-side and low-side transistors require a certain amount of time, a specific dead time delay is added to avoid shoot-through, where the high-side and low-side transistors are simultaneously turned on. The dead time is related to audio performance metrics and shoot-through current, and it is generally not adjustable by users in integrated audio amplifiers. The dead time loss is given by Equation 4, which shows that the dead time loss is also proportional to the PVDD voltage.

Equation 4.

P_{D T} = 4 \times V_{F} \times I_{o u t} \times t_{D T} \times f_{s w} = 4 \times V_{F} \times (\frac{V_{p v d d}}{2 R_{d s (o n)} + R_{L}}) \times t_{D T} \times f_{s w}

The LC filter loss mainly comes from the inductor's impedance loss, especially the DCR loss. As given by $P_{L (D C R)} = {2 \times (\frac{V_{p v d d}}{2 R_{d s (o n)} + R_{L}})}^{2} \times D C R$ , this type of loss is also proportional to the PVDD voltage.

Conduction loss dominates at high-power output, while switching loss and drive loss dominate at low-power output. These losses add up to the total loss that affects the operating efficiency of an audio amplifier. They must be optimized during the design phase based on real-world application conditions. Parameters such as f_sw, Q_g, R_ds(on), and t_DT have a significant impact on losses. However, they are generally less likely to be adjustable in integrated audio amplifiers. For example, the switching frequency f_sw of the TAS58xx can only be selected from 384kHz, 480kHz, 576kHz, and 768kHz, and parameters such as Q_g, R_ds(on), and t_DT are not adjustable by users. How to optimize efficiency then? Here are two effective methods to reduce losses and optimize audio amplifier efficiency.