SLAAEU7 February   2025 TAS5805M

 

  1.   1
  2.   Abstract
  3. 1Power Architecture of a Class-D Digital Audio Amplifier and Its Loss Breakdown
  4. 2Improving Audio Amplifier Efficiency with Class-H Mode
    1. 2.1 How Class-H Mode Improves Efficiency
    2. 2.2 TI's Digital Class-H Innovation
  5. 3Improving Efficiency With External GVDD and AVDD and Considerations
    1. 3.1 Testing Power Saving from External GVDD and AVDD and Testing the Impact on Audio Metrics
    2. 3.2 Considerations for External GVDD and AVDD:
      1. 3.2.1 Voltage Range of External GVDD and AVDD:
      2. 3.2.2 Sequence Requirements for External GVDD and AVDD:
  6. 4Summary
  7. 5References

Sequence Requirements for External GVDD and AVDD:

Always follow the power-up and power-down sequences specified by TI for GVDD and AVDD to be supplied externally:

  • SN005825P sequences for external GVDD and AVDD:
    • Audio amplifier startup sequence:
      1. Turn on PVDD and DVDD
      2. When power supplies are stable, pull up PDN and start supplying I2S.
      3. After the I2S clock is stable, start writing the audio amplifier configuration via I2C.
      4. Start the external GVDD/AVDD supply after the audio amplifier configuration is complete
       SN005825P Startup Sequence for External GVDD/AVDDFigure 3-5 SN005825P Startup Sequence for External GVDD/AVDD
    • Key considerations:
      1. After the audio amplifier enters HIZ, internal GVDD and AVDD will be turned on.
      2. After internal GVDD and AVDD are turned on, external GVDD and AVDD can be turned on after a 1ms delay
      3. External GVDD and AVDD supplies are turned on only after PVDD power-up and PDN has been pulled high.
    • Audio amplifier power-down sequence:
      1. Use the I2C command to let the audio amplifier enter HIZ
      2. Delay at least 6ms (48kHz) for digital volume ramp down
      3. Turn off external GVDD and AVDD supplies
      4. Turn off PVDD and DVDD
       SN005825P Power-Down Sequence for External GVDD/AVDDFigure 3-6 SN005825P Power-Down Sequence for External GVDD/AVDD

    Key consideration: External GVDD and AVDD must be turned off before PDN is pulled low.

  • TAS5827/TAS5828/TAS5830 Sequence Requirements for External GVDD and AVDD:
    • Startup sequence (Figure 3-7):
      1. Bring up power supplies (PVDD, DVDD)
      2. Once power supplies are stable, bring up PDN.
      3. Configure I2C initialization. 4.3V code insert to 'DSP ready to configure' section
      4. Provide external power rail to AVDD/GVDD
      5. Complete I2C initialization.
      6. No special requirement for I2S sequence, but suggest to provide stable clock before enter play.
      7. Enter play mode.
       TAS5828/TAS5827 Power-up Sequence for External GVDD/AVDDFigure 3-7 TAS5828/TAS5827 Power-up Sequence for External GVDD/AVDD
    • Power-down sequence (Figure 3-8):
      1. I2C command let AMP enter HIZ.
      2. Turn off external GVDD & AVDD supply.
      3. I2C command enter deep sleep or pull PDN down
      4. Delay at least 6ms (48kHz) for volume ramp down.
      5. Turn off PVDD and then DVDD
       TAS5828/TAS5827 Power-Down Sequence for External GVDD/AVDDFigure 3-8 TAS5828/TAS5827 Power-Down Sequence for External GVDD/AVDD